學術出版;;Publications

Permanent URI for this communityhdl:11536/1

收集所有交通大學研究人員與學生個人或團體所發表之各項學術著作，涵蓋期刊論文、教師專書、學位論文等項。;;Collections of Publications of NCTU Researchers and Students Like Journal Papers and Thesis.

Browse

🏛️國立陽明交通大學機構典藏

Search Results

Now showing 1 - 9 of 9

Survey of Turbo, LDPC, and Polar Decoder ASIC Implementations
(2019-01-01)
Shao, Shuai
;
Hailes, Peter
;
Wang, Tsang-Yi
;
Wu, Jwo-Yuh
;
Maunder, Robert G.
Channel coding may be viewed as the best-informed and most potent component of cellular communication systems, which is used for correcting the transmission errors inflicted by noise, interference, and fading. The powerful turbo code was selected to provide channel coding for mobile broad band data in the 3G UMTS and 4G long term evolution cellular systems. However, the 3GPP standardization group has recently debated whether it should be replaced by low density parity check (LDPC) or polar codes in 5G new radio, ultimately reaching the decision to adopt the LDPC code family for enhanced mobile broad band (eMBB) data and polar codes for eMBB control. This paper summarizes the factors that influenced this debate, with a particular focus on the application specific integrated circuit (ASIC) implementation of the decoders of these three codes. We show that the overall implementation complexity of turbo, LDPC, and polar decoders depends on numerous other factors beyond their computational complexity. More specifically, we compare the throughput, error correction capability, flexibility, area efficiency, and energy efficiency of ASIC implementations drawn from 110 papers and use the results for characterizing the advantages and disadvantages of these three codes as well as for avoiding pitfalls and for providing design guidelines.
A New Genetics-Aided Message Passing Decoding Algorithm for LDPC Codes
(2012-01-01)
Hung, Jui-Hui
;
Lu, Yi-De
;
Chen, Sau-Gee
;
電子工程學系及電子研究所
;
Department of Electronics Engineering and Institute of Electronics
The popular LDPC decoding algorithms based on the message passing (MP) algorithm have high decoding performances. However, they are noticeably inferior to the maximum likelihood (ML) decoding algorithm. This work proposes a genetics-aided message passing (GA-MP) algorithm by applying a new genetic algorithm to MP algorithm. As a result, significantly performance improvement over MP algorithm can be achieved. Besides, compared with other genetic-aided decoding algorithms, the proposed algorithm has much better performances and much lower computational complexity. Simulations show that the decoding performance of GA-MP algorithm can achieve performances very close to the algorithm, while outperform MP algorithm. Besides, its performance will grow proportionally with the generation number without leveling off as observed in conventional MP algorithms, under high SNR condition.
An Efficient LDPC Decoder Architecture with a High-Performance Decoding Algorithm
(2010-11-01)
Hung, Jui-Hui
;
Chen, Sau-Gee
;
電子工程學系及電子研究所
;
Department of Electronics Engineering and Institute of Electronics
In this work a high performance LDPC decoder architecture is presented It is a partially parallel architecture for low complexity consideration In order to eliminate the idling time and hardware complexity in conventional partially parallel decoders the decoding process decoder architecture and memory structure are optimized Particularly the parity check matrix is optimally partitioned into four unequal sub matrices that lead to high efficiency in hardware sharing As a result it can handle two different codewords simultaneously with 100% hard ware utilization Furthermore for minimizing the performance loss due to round off errors in fixed point implementations the well known mod died min sum decoding algorithm is enhanced by our recently proposed high performance CMVP decoding algorithm Overall the proposed de coder has high throughput low complexity and good BER performances In the circuit implementation example of the (576 288) parity check matrix for IEEE 802 16e standard the decoder achieves a data rate of 5 5 Gbps assuming 10 decoding iterations and 7 quantization bits with a small area of 653K gates based on UMC 90 nm process technology
Cross-Layer Error Recovery Scheme for Data Transmission over 4G Wireless Networks
(2015)
Yang, Wen-Chih
;
Chen, Ming-Dao
;
Hsiao, Hsu-Feng
;
資訊工程學系
;
Department of Computer Science
In a video streaming application, quality of experience for a user can be affected by various factors. The video quality can be improved if the effective throughput can be increased at an acceptable packet loss rate and low latency. To reduce the packet loss rate over error-prone channels, a cross-layer error control scheme is developed for heterogeneous data transmission over wireless channels in this paper. The error control scheme utilizes both link-layer automatic repeat request and application-layer channel coding. The automatic repeat request is served as providing a basic level of loss recovery without introducing intolerable delay, while the application-layer channel coding is based on the previously developed layer-aligned multipriority rateless codes to satisfy a desired packet loss rate at a minimal bandwidth overhead. The cross-layer architecture of the error control scheme will control the retransmission timers based on the channel conditions while the control parameters of the layer-aligned multipriority rateless codes will be determined to fulfill the heterogeneous requirement of overall packet loss rate required by an application at a minimal cost. The improved performance of the developed cross-layer scheme is confirmed with the experiments using a real-world 4G system.
多視點視訊產生、傳輸與分析---子計畫四：在無線寬頻網路上感官式自由視角視訊之即時瀏覽技術與編碼研究
(2014)
蕭旭峰
;
Hsiao Hsu-Feng
;
國立交通大學資訊工程學系（所）
最近數年，自由視角電視由於相關設備與訊號處理技術的演進，相關的研究有快速的成長，在MPEG 也相當積極進行自由視角電視標準化的動作。自由視角電視系統在網路上傳遞視訊資料到用戶端，也讓其可以自由選擇所欲觀賞視角的視訊。由於用戶端選擇的視角可能是沒有實際擷取視訊的角度，而需要在該視角進行視訊合成。除此之外，文獻上對於流暢之即時視角轉換相關的研究較為缺乏，而在無線寬頻網路有限而且不穩定的頻寬資源上傳輸多視角視訊也有相當的挑戰。我們規劃以三年的時間，延續先前多視角景深估計演算法的成果與感官視訊串流相關之經驗，發展更完善之視角合成演算法，並根據自由視角使用者轉換視角的情況，在即時瀏覽的前提下研究不同複雜程度之合成演算法排程決策之制定，使自由視角系統在裝置所能負擔的資源之下發揮最佳觀賞經驗。當自由視角電視在網路上傳遞視訊時，我們規劃以可調式編碼方式壓縮多視角視訊，並發展對應之感官式合成品質預估演算法與不對稱保護之分層通道編碼，將網路可用頻寬資源進行頻寬資源分配的最佳化，以使自由視角視訊的使用經驗品質獲得長足的進步。
多視點視訊產生、傳輸與分析-子計畫四：在無線寬頻網路上感官式自由視角視訊之即時瀏覽技術與編碼研究
(2012)
蕭旭峰
;
Hsiao Hsu-Feng
;
國立交通大學資訊工程學系（所）
最近數年，自由視角電視由於相關設備與訊號處理技術的演進，相關的研究有快速的成長，在MPEG 也相當積極進行自由視角電視標準化的動作。自由視角電視系統在網路上傳遞視訊資料到用戶端，也讓其可以自由選擇所欲觀賞視角的視訊。由於用戶端選擇的視角可能是沒有實際擷取視訊的角度，而需要在該視角進行視訊合成。除此之外，文獻上對於流暢之即時視角轉換相關的研究較為缺乏，而在無線寬頻網路有限而且不穩定的頻寬資源上傳輸多視角視訊也有相當的挑戰。我們規劃以三年的時間，延續先前多視角景深估計演算法的成果與感官視訊串流相關之經驗，發展更完善之視角合成演算法，並根據自由視角使用者轉換視角的情況，在即時瀏覽的前提下研究不同複雜程度之合成演算法排程決策之制定，使自由視角系統在裝置所能負擔的資源之下發揮最佳觀賞經驗。當自由視角電視在網路上傳遞視訊時，我們規劃以可調式編碼方式壓縮多視角視訊，並發展對應之感官式合成品質預估演算法與不對稱保護之分層通道編碼，將網路可用頻寬資源進行頻寬資源分配的最佳化，以使自由視角視訊的使用經驗品質獲得長足的進步。
多視點視訊產生、傳輸與分析-子計畫四：在無線寬頻網路上感官式自由視角視訊之即時瀏覽技術與編碼研究
(2013)
蕭旭峰
;
Hsiao Hsu-Feng
;
國立交通大學資訊工程學系（所）
最近數年，自由視角電視由於相關設備與訊號處理技術的演進，相關的研究有快速的成長，在MPEG 也相當積極進行自由視角電視標準化的動作。自由視角電視系統在網路上傳遞視訊資料到用戶端，也讓其可以自由選擇所欲觀賞視角的視訊。由於用戶端選擇的視角可能是沒有實際擷取視訊的角度，而需要在該視角進行視訊合成。除此之外，文獻上對於流暢之即時視角轉換相關的研究較為缺乏，而在無線寬頻網路有限而且不穩定的頻寬資源上傳輸多視角視訊也有相當的挑戰。我們規劃以三年的時間，延續先前多視角景深估計演算法的成果與感官視訊串流相關之經驗，發展更完善之視角合成演算法，並根據自由視角使用者轉換視角的情況，在即時瀏覽的前提下研究不同複雜程度之合成演算法排程決策之制定，使自由視角系統在裝置所能負擔的資源之下發揮最佳觀賞經驗。當自由視角電視在網路上傳遞視訊時，我們規劃以可調式編碼方式壓縮多視角視訊，並發展對應之感官式合成品質預估演算法與不對稱保護之分層通道編碼，將網路可用頻寬資源進行頻寬資源分配的最佳化，以使自由視角視訊的使用經驗品質獲得長足的進步。
A Real-Time High-Throughput LDPC Decoder for IEEE 802.3an Standard
(2010)
Hung, Jui-Hui
;
Kao, Li-Wei
;
Chen, Sau-Gee
;
電子工程學系及電子研究所
;
Department of Electronics Engineering and Institute of Electronics
The existing LDPC decoders are mostly based on the belief-propagation (BP) algorithms, due to good BER performances. However, they demand large chip areas. This paper proposes a high-throughput LDPC decoder based on the bit-flipping algorithms, for the (2048, 1723) RS-LDPC code adopted in the IEEE 802.3an standard. High decoding performances and low iteration numbers are achieved by introducing a strategy of flipping low-correlation bits and an additional syndrome vote scheme. As a result, the decoding performance is very close to the most popular BP-based min-sum algorithm (MSA) but with much lower computational complexity. Besides, the decoder achieves high hardware utilization with real-time processing capability. Synthesized with UMC 90nm process, the decoder chip area, throughput and average power dissipation are 1.42M gates, 16Gbps and 368mW, respectively, at 500MHz clock rate. Compared with existing BP-based designs, it has much smaller chip area and lower power dissipation, with comparable performances.
A High-Performance Multibit-Flipping Algorithm for LDPC Decoding
(2009)
Hung, Jui-Hui
;
Chen, Sau-Gee
;
電子工程學系及電子研究所
;
Department of Electronics Engineering and Institute of Electronics
For LDPC decoding, bit-flipping (BF) algorithms are much simpler than the min-sum algorithms (MSA). However, BF algorithms have the disadvantages of poorer performances and higher iteration counts than MSA. This paper introduces the concepts of low correlation search and culprit vote to further improve the efficiency of the existing BF algorithms. High decoding performances and low iteration number are achieved by flipping those bits with low correlation as much as possible and introducing an additional syndrome vote procedure. As a result, the proposed algorithm can achieve significant decoding performance which is very close to the min-sum algorithm (MSA) but with much lower computation complexity.

學術出版;;Publications

Browse

Filters

Settings

Sort By

Results per page

🏛️國立陽明交通大學機構典藏

Search Results