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Channel estimation for OFDM systems based on comb-type pilot arrangement in frequency selective fading channels
(1998-02-01)
Hsieh, MH
;
Wei, CH
;
電子工程學系及電子研究所
;
Department of Electronics Engineering and Institute of Electronics
In this paper, the channel estimation methods for OFDM systems based on comb-type pilot sub-carrier arrangement are in vestigated. The channel estimation algorithm based on comb-type pilots is divided into pilot signal estimation and channel interpolation. The pilot signal estimation based on LS or MMSE criteria, together with channel interpolation based on piecewise-linear interpolation or piecewise second-order polynomial interpolation is studied. Owing to the MMSE estimate of pilot signals, the inter-carrier interference and additive white Gaussian noise are reduced considerably. The computational complexity of pilot signal estimation based on MMSE criterion can be reduced by using a simplified LMMSE estimator with low-rank approximation using singular value decomposition. Phase compensators before and after interpolation are also presented to combat the phase changes of subchannel symbols arising from the frame synchronization errors. Comparing to the transform-domain processing based channel estimation algorithm, the MMSE estimate of pilot signals together with phase compensated linear interpolation algorithm provides better performance and requires less computations.
An adaptive multialphabet arithmetic coding for video compression
(1998-04-01)
Hsieh, MH
;
Wei, CH
;
電子工程學系及電子研究所
;
Department of Electronics Engineering and Institute of Electronics
In this paper, the hardware implementation issues far an adaptive multialphabet arithmetic coder are discussed. A simple weighted history model is proposed to encode the video dare, This model uses a weighted finite buffer to model the cumulative density function of the arithmetic coder. The performance of the weighted history model is evaluated together with several other well-known models. To access, search, and update the cumulative frequencies corresponding to model symbols in real rime, we present a low complexity multibase cumulative occurrence array structure that can offer the probability information Tor high-speed encoding and decoding, for the application in video compression, the multialphabet arithmetic coding with weighted history model can be a good choice as the variable length coding of the video symbols.
A low-complexity frame synchronization and frequency offset compensation scheme for OFDM systems over fading channels
(1999-09-01)
Hsieh, MH
;
Wei, CH
;
電子工程學系及電子研究所
;
Department of Electronics Engineering and Institute of Electronics
dThis paper presents a fast low-complexity synchronization scheme for orthogonal frequency division multiplexing (OFDM) systems over fading channels. By utilizing the guard interval in OFDM signals, the Frame synchronization and the frequency offset estimation are considered simultaneously. The Implementation can be simplified by only using the sign bits of the in-phase and the quadrature components of the received OFDM signal for frame synchronization and frequency offset compensation. A frequency-offset independent frame synchronization algorithm is derived, and a low-complexity frequency offset estimator based on the synchronized correlator output is presented in this paper. Due to the subcarrier ambiguity in the guard-interval-based (GIB) frequency detector, the maximum correctable frequency range is limited to +/- 1/2 of the subcarrier spacing. In this paper, we also present a new frequency acquisition scheme that can solve the subcarrier ambiguity problem and extend the frequency acquisition range to nearly a half of the useful OFDM signal bandwidth.
Using knowledge-based systems for research on parallelizing compilers
(2001-03-01)
Yang, CT
;
Tseng, SS
;
Fann, YW
;
Tsai, TK
;
Hsieh, MH
The main function of parallelizing compilers is to analyze sequential programs, in particular the loop structure, to detect hidden parallelism and automatically restructure sequential programs into parallel subtasks that are executed on a multiprocessor. This article describes the design and implementation of an efficient parallelizing compiler to parallelize loops and achieve high speedup rates on multiprocessor systems. It is well known that the execution efficiency of a loop can be enhanced if the loop is executed in parallel or partially parallel, such as in a DOALL or DOACROSS loop. This article also reviews a practical parallel loop detector (PPD) that is implemented in our PFPC on finding the parallelism in loops. The PPD can extract the potential DOALL and DOACROSS loops in a program by verifying array subscripts. In addition, a new model by using knowledge-based approach is proposed to exploit more loop parallelisms in this paper. The knowledge-based approach integrates existing loop transformations and loop scheduling algorithms to make good use of their ability to extract loop parallelisms. Two rule-based systems, called the KPLT and IPLS, are then developed using repertory grid analysis and attribute-ordering tables respectively, to construct the knowledge bases. These systems can choose an appropriate transform and loop schedule, and then apply the resulting methods to perform loop parallelization and obtain a high speedup rate. For example, the IPLS system can choose an appropriate loop schedule for running on multiprocessor systems. Finally, a runtime technique based on the inspector/executor scheme is proposed in this article for finding available parallelism on loops. Our inspector can determine the wavefronts of a loop with any complex indirected array-indexing pattern by building a DEF-USE table. The inspector is fully parallel without any synchronization. Experimental results show that the new method can resolve any complex data dependence patterns where no previous research can. One of the ultimate goals is to construct a high-performance and portable FORTRAN parallelizing compiler on shared-memory multiprocessors. We believe that our research may provide more insight into the development of a highperformance parallelizing compiler Copyright (C) 2001 John Wiley & Sons, Ltd.
A tool portfolio elimination mechanism (TPEM) for a wafer fab
(2004)
Chung, SH
;
Hsieh, MH
;
Liu, JC
;
工業工程與管理學系
;
Department of Industrial Engineering and Management
Wafer manufacturers usually face critical problems when making decisions regarding to the tool portfolio elimination, mainly due to the dramatic and frequent influences from their internal and external environments. This paper is aimed to develop a mechanism, named Tool Portfolio Elimination Mechanism (TPEM), to evaluate the impacts on production performance and capital expenditure, and to determine which equipment is suitable for pruning. In TPEM, there are four stages to decide tool portfolio elimination according to the PDCA cycle. Meanwhile, the simulation results show; that the fab production performance and cost are much improved by the TPEM algorithm. Especially, it can be applied and implemented to industry very quickly and easily.
Improvement in light-output efficiency of near-ultraviolet InGaN-GaN LEDs fabricated on stripe patterned sapphire substrates
(2005-09-25)
Lee, YJ
;
Hsu, TC
;
Kuo, HC
;
Wang, SC
;
Yang, YL
InGaN/GaN multi-quantum wells near ultraviolet light-emitting diodes (LEDs) were fabricated on a patterned sapphire substrate (PSS) with parallel stripe along the (1100)(sapphire) direction by using low-pressure metal-organic chemical vapor deposition (MOCVD). The forward- and reverse-bias electrical characteristics of the stripe PSS LEDs are, respectively, similar and better than those of conventional LEDs on sapphire substrate. The output power of the epoxy package of stripe PSS LED was 20% higher than that of the conventional LEDs. The enhancement of output power is due not only to the reduction of dislocation density but also to the release of the guided light in LEDs by the geometric shape of the stripe PSS, according to the ray-tracing analysis. (c) 2005 Elsevier B.V. All rights reserved.
Increasing the extraction efficiency of AlGaInP LEDs via n-side surface roughening
(2005-11-01)
Lee, YJ
;
Kuo, HC
;
Wang, SC
;
Hsu, TC
;
Hsieh, MH
An n-side-up AlGaInP-based light-emitting diode (LED) with a triangle-like surface morphology was fabricated using the adhesive layer bonding technique, followed by wet etching to roughen the surface. The light output power of the roughened-surface LED was 1.6 times higher than that of a flat-surface LED at an injection current of 20 mA, i.e., a significant improvement attributed to the ability of the roughened surface to not only reduce the internal reflection between the rear mirror system and the semiconductor-air interface, but also to effectively scatter the light outside the LED device.
Improvement in light-output efficiency of AlGaInP LEDs fabricated on stripe patterned epitaxy
(2005-12-01)
Lee, YJ
;
Tseng, HC
;
Kuo, HC
;
Wang, SC
;
Chang, CW
Quaternary AlGaInP light-emitting diodes (LEDs) operating at a wavelength of 630 nm with a stripe-patterned omni-directional reflector (ODR) were fabricated. It is demonstrated that the geometrical shape of stripe-patterned structure improves the light extraction efficiency by increasing the extraction of guided light. The optical and electrical characteristics of stripe-patterned ODR LEDs are presented and compared to typical ODR and distributed Bragg reflector (DBR) LEDs with the same epitaxial structure and emitting wavelength. It is shown that the output power of the stripe-patterned ODR LED exceeds that of the typical ODR and DBR LEDs by a factor of 1.15 and 2 times, respectively, and with an acceptable forward voltage of about 2.2 V.
AlGaInP light-emitting diodes with stripe patterned omni-directional reflector
(2006-02-01)
Lee, YJ
;
Lu, TC
;
Kuo, HC
;
Wang, SC
;
Liou, MJ
An n-side-up AlGaInP-based light-emitting diode (LED) with a stripe-patterned omni-directional reflector (ODR) was fabricated by adopting the adhesive-layer bonding scheme. Comparing to the conventional ODR LED, the stripe-patterned ODR LED significantly enhanced the output power with an only slight higher forward voltage. This improvement was analyzed by the scanning near-field optical microscope (SNOM) and could be attributable to the geometrical shape of stripe patterns that redirects the guided light towards to the escaping cone of the LED surface. The optimized dimension of stripe patterns was also calculated by simply modeling a LED dice with a stripe-patterned ODR structure, according to optical ray-tracing method.
High brightness AlGaInP-based light emitting diodes by adopting the stripe-patterned omni-directional reflector
(2006-02-01)
Lee, YJ
;
Lu, TC
;
Kuo, HC
;
Wang, SC
;
Liou, MJ
An n-side-up AlGaInP-based LED operating at a wavelength of 630 nm with a stripe-patterned omni-directional reflector (ODR) was fabricated by adopting the adhesive-layer bonding scheme. It is demonstrated that the periodic and geometrical shape of the stripe-patterned array improves the light extraction efficiency by increasing the extraction of guided light. Compared to the conventional ODR LED, the stripe-patterned ODR LED significantly enhanced the output power and with only a slightly higher forward voltage. This improvement was analysed by the scanning near-field optical microscope (SNOM) and the optimized dimension of stripe patterns was also calculated on the basis of a Monte Carlo ray tracing simulation. According to the above analysis, the increase of light extraction could not only be attributed to the geometrical shape of the stripe patterns that redirect the trapped light towards the top-escaping cone of the LED surface but also to the repetitive stripe-patterned array of diffracting elements that effectively diffract the guided light outside the LED surface. Moreover, the optimized dimension of the stripe pattern is 3 mu m wide, 2 mu m deep and spaced 3 mu m apart, which coincides with experimental results.

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