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Item type:Item, Effects of N2O-annealed sacrificial oxide on the short-channel effects of nMOSFETs(1998-02-19) ;Jong, FC ;Huang, TY ;Chao, TS ;Lin, HCWang, MFThe authors report the effects of N2O-annealed sacrificial oxide on nMOSFETs. It is demonstrated that by adding an N2O-annealing step to the sacrificial. oxide which was stripped off before growing the final gate oxide, the reverse short-channel effects (RSCE) can still be effectively suppressed.Item type:Item, Evaluation of plasma charging damage in ultrathin gate oxides(1998-03-01) ;Lin, HC ;Chen, CC ;Chien, CH ;Hsein, SKWang, MFMonitoring of plasma charging damage in ultrathin oxides (e.g., <4 nm) is essential to understand its impact on device reliability. However, it is observed that the shift of several device parameters, including threshold voltage, transconductance, and subthreshold swing, are not sensitive to plasma charging and thus not suitable for this purpose. Consequently, some destructive methods, such as the charge-to-breakdown measurement, are necessary to evaluate plasma damage in the ultrathin oxides.Item type:Item, Rugged surface polycrystalline silicon film formed by rapid thermal chemical vapor deposition for dynamic random access memory stacked capacitor application(1998-06-01) ;Lin, M ;Chang, CY ;Huang, TY ;Kuo, UJ電子工程學系及電子研究所Polycrystalline silicon films with a rugged surface (rugged poly-Si), deposited by a single-wafer rapid thermal chemical vapor deposition (RTCVD) system suitable for 12 inch wafer fabrication, are studied and the films have been successfully applied to bottom storage electrodes for stacked capacitors in dynamic random access memory cells. Our data show that the rugged poly-Si is actually formed by the nucleation generation on the amorphous silicon surface and subsequent crystalline growth during the annealing step following deposition. We also determined that a wide temperature window exists for the formation of rugged poly-Si (i.e., +/- 15 degrees C) using RTCVD, which is wider than that using low pressure chemical vapor deposition (LPCVD) (i.e., +/-3 degrees C) and ultra high vacuum chemical vapor deposition (UHVCVD) (i.e., +/-10 degrees C). Stacked capacitors fabricated using rugged poly-Si and thin silicon oxide/silicon nitride dielectric film show that for a rugged poly-Si storage electrode with a 60 nm top-layer and 645 degrees C annealing, an effective surface area of approximately 2.9 times that of a conventional poly-Si film electrode is obtained.Item type:Item, Improving radiation hardness of EEPROM/flash cell by N2O annealing(1998-07-01) ;Huang, TY ;Jong, FC ;Chao, TS ;Lin, HCLeu, LYThe effects of an N2O anneal on the radiation effects of a split-gate electrical erasable programmable read only memory (EEPROM)/flash cell with a recently-proposed horn-shaped floating gate were studied. We have found that although the cells appear to survive 1 Mrad(Si) Co-60 irradiation without data retention failure, the write/erase cycling endurance was severely impeded after irradiation. Specifically, the write/erase cycling endurance was degraded to 20 K from the pre-irradiation value of 50 K, However, by adding an N2O annealing step after the interpoly oxidation, the after-irradiation write/erase cycling endurance of the resultant cell can be significantly improved to over 45 K, N2O annealing also improves the after-irradiation program and erase efficiencies. The N2O annealing step therefore presents a potential method for enhancing the robustness of the horn-shaped floating-gate EEPROM/flash cells for radiation-hard applications.Item type:Item, Comparison of N-2 and NH3 plasma passivation effects on polycrystalline silicon thin-film transistors(1998-07-01) ;Lee, YS ;Lin, HY ;Lei, TF ;Huang, TYChang, TCThe passivation effects of pure N-2 plasma on polycrystalline silicon (poly-Si) thin-film transistors (TFTs) have been studied and compared with those of NH3 plasma. We found that, similar to the recently-proposed NH3 plasma passivation, N-2 plasma passivation can also effectively improve device parameters such as field effect mobility, threshold voltage subthreshold swing, off current, and on/off current ratio. While the improvement of NH3-passivated devices can be attributed to both hydrogen and nitrogen passivation effects, nitrogen passivation alone is mainly responsible for the improvement of N-2-passivated devices. Zn addition, we round that N-2-passivated devices exhibit much better hot-carrier reliability than NH3-passivated devices. The better hot-carrier reliability of N-2-passivated devices can be explained by the formation of strong Si-N bonds which are difficult to break, while effectively eliminating the weaker N-H bonds, which are inevitable in NH3-passivated devices. The results of a Fourier. transform infrared (FTIR) spectrum analysis performed in this study are consistent with this proposition.Item type:Item, Improvement of reliability of metal-oxide semiconductor field-effect transistors with N2O nitrided gate oxide and N2O polysilicon gate reoxidation(1998-10-01) ;Lai, CS ;Chao, TS ;Lei, TF ;Lee, CLHuang, TYA systematic study of the impact of the reliability of metal-oxide semiconductor field-effect transistors (MOSFETs) with N2O nitrided gate oxides and N2O poly-reoxidation was conducted. The improvements include hot carrier immunity, suppression of reverse short channel effect and suppression of plasma-induced degradation. These improvements are due to nitrogen incorporation at the oxide/Si-substrate interface. All data presented in this study involve substantially low thermal budget (850 degrees C), making this N2O-related technology extremely attractive and promising for future scaled devices.Item type:Item, The effects of shallow germanium halo doping on N-channel metal oxide semiconductor field effect transistors(1999-01-15) ;Wang, MF ;Chien, CH ;Chao, TS ;Lin, HCJong, FCIn this paper, we report the use of shallow germanium halo doping on improving the short-channel effects of deep submicron n-channel metal-oxide-semiconductor field effect transistors. It is demonstrated that by adding a shallow (i.e., 10 keV) germanium large-angle-tilt implant (LATID), V-th lowering in short-channel transistors is significantly improved. The improvement is found to increase with increasing germanium dose. A low germanium dose (e.g., 5 x 10(12) cm(-2)) is also found to effectively improve the drain-induced barrier lowering (DIBL) of the short-channel transistors. Our results also show that junction leakage degradation, which has been previously reported to accompany germanium implants using higher energy, can be minimized by the shallow low-dose implant used in this study.Item type:Item, Oxide thickness dependence of plasma charging damage(1999-03-01) ;Lin, HC ;Chen, CC ;Wang, MF ;Hsien, SKChien, CHCharging damage induced in oxides with thickness ranging from 8.7 to 2.5 nm is investigated. Results of charge-to-breakdown (Q(bd)) measurements performed on control devices indicate that the polarity dependence increases with decreasing oxide thickness at both room and elevated temperature (180 degrees C) conditions. As the oxide thickness is thinned down below 3nm, the Q(bd) becomes very sensitive to the stressing current density and temperature. Experimental results show that severe antenna effect would occur during plasma ashing treatment in devices with gate oxides as thin as 2.6 nm. It is concluded that high stressing current level, negative plasma charging, and high process temperature are key factors responsible for the damage. (C) 1999 Elsevier Science Ltd. All rights reserved.Item type:Item, Leakage current reduction of chemical-vapor-deposited Ta2O5 films on rugged polycrystalline silicon electrode for dynamic random access memory application(1999-04-01) ;Lin, M ;Chang, CY ;Huang, TY ;Shieh, WY電子工程學系及電子研究所In this paper we describe the electrical and physical characterizations of Ta2O5 films on rapid thermal nitrided (RTN) rugged polycrystalline silicon electrodes for 256 M dynamic random access memory (DRAM) application. To overcome the higher leakage on Ta2O5 films with rugged poly-Si bottom electrodes, we have successfully employed a light oxidation on rugged poly-Si grains for improving the acute angle of surface morphology, and a post-treatment with rapid thermal nitridation of N2O on Ta2O5 films to reduce the leakage. In addition, a RTN pre-treatment is also applied to prevent rugged poly-Si oxidation during a Ta2O5 film deposition that compromises the effective Ta2O5 thickness. Our results show that Ta2O5 film with an effective thickness of 1.4 nm (physical thickness=10 nm) and a low leakage current density of less than 1 X 10(-8) A/cm(2), suitable for 256 M DRAM application, can be achieved. Our results also show that while a light oxidation on rugged poly-Si grains could improve the acute angle between the rugged poly-Si and its congruent amorphous silicon sub-layer, over oxidation on rugged poly-Si grains could degrade the leakage current and the time dependent dielectric breakdown (TDDB) characteristics of the stacked capacitor.Item type:Item, Reliability of ultrathin gate oxides for ULSI devices(1999-05-01) ;Chang, CY ;Chen, CC ;Lin, HC ;Liang, MSChien, CHUltrathin gate oxide, which is essential for low supply voltage and high driving capability, is indispensable for the continued scaling of ULSI technologies towards smaller and faster devices. Needless to say, the reliability of ultrathin oxide is of major concerns in the manufacturing of the state-of-the-art metal-oxide-semiconductor devices. This payer reviews the reliability issues regarding ultrathin gate oxide for present and future ULSI technologies. Issues including gate leakage current, time-dependent dielectric breakdown, poly-gate depletion, boron penetration, and plasma process-induced damage will be addressed. Several techniques such as nitrided oxide and alternative processes, which are proposed to improve gate oxide reliabilities, are also discussed. (C) 1999 Elsevier Science Ltd. All rights reserved.