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Method for forming gate pattern for electronic device
(2007-03-22)
Chen, Szu-Hung
;
Kuo, Chien-I
;
Chang, Edward Yi
A method for forming a gate pattern for an electronic device, comprising steps of: providing a substrate, whereon a first photo-resist layer is formed; performing a first photo-lithography process so as to form a first pattern with a first width on the substrate; forming a second photo-resist layer, covering the first pattern and the first photo-resist layer on the substrate; and performing a second photo-lithography process, which is shifted from the first photo-lithography process, so as to form a second pattern with a second width on the substrate; wherein the second width is smaller than the first width.
Novel Metamorphic HEMTs With Highly Doped InGaAs Source/Drain Regions for High Frequency Applications
(2010-10-01)
Sahoo, Kartika Chandra
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Kuo, Chien-I
;
Li, Yiming
;
Chang, Edward Yi
;
傳播研究所
In this paper, we report the first result of a strained In(0.52)Ga(0.48) As channel high-electron mobility transistor (HEMT) featuring highly doped In(0.4)Ga(0.6) As source/drain (S/D) regions. A lattice mismatch of 0.9% between In(0.52)Ga(0.48) As and In(0.4)Ga(0.6) As S/D has resulted in a lateral strain in the In(0.52)Ga(0.48) As channel region, where the series resistance is reduced with highly doped S/D regions. An experimentally validated device simulation is advanced for the proposed HEMT, and the results of this paper have shown that there are 60% drive-current and 100% transconductance improvements, compared with the conventional structure. A remarkable 150-GHz increase in the cutoff frequency has been seen for the proposed structure over the conventional one as well for the shown devices.
Improvement on the noise performance of InAs-based HEMTs with gate sinking technology
(2010-11-01)
Hsu, Heng-Tung
;
Kuo, Chien-I
;
Chang, Edward Y.
;
Kuo, Fang-Yao
;
材料科學與工程學系
Improvement on the RF and noise performance for 80 nm InAs/In(0.7)Ga(0.3)As high-electron mobility transistor (HEMT) through gate sinking technology is presented. After gate sinking at 250 degrees C for 3 min, the device exhibited a high transconductance of 1900 mS/mm at a drain bias of 0.5 V with 1066 mA/mm drain-source saturation current. A current-gain cutoff frequency (f(T)) of 113 GHz and a maximum oscillation frequency (f(max)) of 110 GHz were achieved at extremely low drain bias of 0.1 V. The 0.08 x 40 mu m(2) device with gate sinking demonstrated 0.82 dB minimum noise figure and 14 dB associated gain at 17 GHz with only 1.14 mW DC power consumption. Significant improvement in RF and noise performance was mainly attributed to the reduction of gate-to-channel distance together with the parasitic source resistance through gate sinking technology. (C) 2010 Elsevier B.V. All rights reserved.
Improvement in RF performance of 40-nm InAs-channel based HEMTs using Pt gate sinking with two-step recess processes technology
(2010-12-01)
Kuo, Chien-I
;
Hsu, Heng-Tung
;
Wu, Chien-Ying
;
Chang, Edward Y.
;
Chen, Yu-Lin
Forty-nanometer lnAs HEMT devices fabricated by two-step recess and Pt-buried gate were demonstrated for low-noise and low-power millimeter wave applications. The device exhibited a high transconductance of 1650 mS/mm at a drain voltage of 0.5 V. Improvement of the current-gain cutoff frequency from 395 GHz to 423 GHz was achieved with minimum noise figure below 2.5 dB up to 64 GHz at only 4.33 mW DC power consumption level. Besides, the output conductance was decreased from 2400 mS/ mm to 325 mS/mm. These superior performances are attributed to mitigation of the short-channel effect through the proposed technology. (C) 2010 Elsevier B.V. All rights reserved.
Investigation of Characteristics of Al2O3/n-In (x) Ga1-x As (x=0.53, 0.7, and 1) Metal-Oxide-Semiconductor Structures
(2013-08-01)
Trinh, Hai-Dang
;
Lin, Yueh-Chin
;
Kuo, Chien-I
;
Chang, Edward Yi
;
Hong-Quan Nguyen
The electrical properties of Al2O3/n-InGaAs metal-oxide-semiconductor capacitors (MOSCAPs) with In content of 0.53, 0.7, and 1 (InAs) have been investigated. Results show small capacitance-voltage (C-V) frequency dispersion in accumulation (1.70% to 1.85% per decade) for these MOSCAPs, mostly being assigned to border traps in Al2O3. With higher In content, shorter minority-carrier response time and smaller C-V hysteresis are observed. The reduction of C-V hysteresis might be related to the reduction of Ga-bearing oxides in Al2O3/InGaAs interfaces as indicated by x-ray photoelectron spectroscopy.
Ge epitaxial films on GaAs (100), (110), and (111) substrates for applications of CMOS heterostructural integrations
(2013-03-01)
Tang, Shih-Hsuan
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Kuo, Chien-I
;
Trinh, Hai-Dang
;
Chang, Edward Yi
;
Nguyen, Hong-Quan
Epitaxial Ge films were grown on GaAs (100), (110), and (111) substrates by using ultra-high vacuum chemical vapor deposition and studied with various methods. The incubation times and growth rates were quite different for these three GaAs substrates because the surface arsenic coverage on GaAs and hydrogen desorption energy on Ge are different for each orientation. High-resolution x-ray diffraction measurements, direct band-gap emission of photoluminescence measurements, and cross-sectional transmission electron microscopy showed that the Ge films had high crystal quality, low defect density, and sharp Ge/GaAs interfaces. In this study, atomic force microscopy analysis found that the Ge films grow on GaAs (100) and (111) via the Frank van der Merwe mode, while the Ge film grows on GaAs (110) via the Volmer-Weber mode at the initial growth stage, which can be explained by the thermodynamic theory of capillarity. Interestingly, when the thickness of the Ge film on the GaAs (110) substrate increases to similar to 220 nm, the 3D Ge islands merge and form a smooth surface (rms roughness of 0.3 nm), which is useful for devices. The authors also fabricated Ge metal-oxide-semiconductor capacitors (MOSCAPs) on GaAs (100) and (110) substrates. Both Ge/GaAs (100) and Ge/GaAs (110) MOSCAPs exhibit good capacitance-voltage responses with strong inversion behaviors, which means the grown material has reached device quality. The Ge/GaAs (110) structure especially offers optimal integration of Ge pMOSFETs on GaAs substrates because Ge (110) has a high hole mobility compared with Ge (100) and (111). (C) 2013 American Vacuum Society. [http://dx.doi.org/10.1116/1.4789427]
InAs Thin-Channel High-Electron-Mobility Transistors with Very High Current-Gain Cutoff Frequency for Emerging Submillimeter-Wave Applications
(2013-03-01)
Chang, Edward-Yi
;
Kuo, Chien-I
;
Hsu, Heng-Tung
;
Chiang, Che-Yang
;
Miyamoto, Yasuyuki
60 nm InAs high-electron-mobility transistors (HEMTs) with a thin channel, a thin InAlAs barrier layer, and a very high gate stem structure have been fabricated and characterized. The thickness of the channel, as well as that of the InAlAs barrier layer, was reduced to 5 nm. A stem height of 250 nm with a Pt-buried gate was used in the device configuration to reduce the parasitics. A high DC transconductance of 2114 mS/mm and a current-gain cutoff frequency (f(T)) of 710 GHz were achieved at V-DS 0.5V. (C) 2013 The Japan Society of Applied Physics
Performance Evaluation of InGaSb/AlSb P-Channel High-Hole-Mobility Transistor Faricated Using BCl3 Dry Etching
(2013-02-01)
Yu, Chia-Hui
;
Hsu, Heng-Tung
;
Chiang, Che-Yang
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Kuo, Chien-I
;
Miyamoto, Yasuyuki
In this study, we present the fabrication and characterization of InGaSb/AlSb p-channel high-hole-mobility-transistor devices using inductively coupled plasma (ICP) etching with BCl3 gas. Devices fabricated by the dry etching technique show good DC and RF performances. Radio-frequency (RF) performance for devices with different source-to-drain spacing (L-SD) and gate length (L-g) were investigated. The fabricated 80-nm-gate-length p-channel device with 2-mu m LSD exhibited a maximum drain current of 86.2mA/mm with peak transconductance (g(m)) of 64.5mS/mm. The current gain cutoff frequency (f(T)) was measured to be 15.8 GHz when the device was biased at V-DS = -1.2 V and V-GS = 0.4 V. (C) 2013 The Japan Society of Applied Physics
Flip-Chip Packaging of In0.6Ga0.4As MHEMT Device on Low-Cost Organic Substrate for W-Band Applications
(2010)
Lim, Wee Chin
;
Wang, Chin-Te
;
Kuo, Chien-I
;
Hsu, Li-Han
;
Tsai, Szu-Ping
A discrete low noise In0.6Ga0.4As MHEMT device with 150 nm gate length was flip-chip assembled on the low-cost RO3210 organic substrate for wireless communication applications. The measured DC characteristics were very similar before and after flip-chip assembly. The flip-chip packaged MHEMT device showed a high drain current density of 516 mA/mm and a maximum transconductance of 576 mS/mm at a V-DS of 0.8 V. The insertion gain of the flip-chip packaged device was decayed less than 2 dB up to 100 GHz as compared to the data of bare die. Moreover, the measured minimum noise figure was less than 2 dB as measured at V-DS of 0.7 V and V-GS of -0.7 V in the frequency range from 20 to 64 GHz for the device after flip-chip assembly. The excellent performance of the flip-chip packaged MHEMT device demonstrates the feasibility of using low cost organic substrate for high frequency applications up to W band.
Bias-Dependent Radio Frequency Performance for 40nm InAs High-Electron-Mobility Transistor with a Cutoff Frequency Higher than 600GHz
(2012-11-01)
Fatah, Faiz
;
Kuo, Chien-I
;
Hsu, Heng-Tung
;
Chiang, Che-Yang
;
Hsu, Ching-Yi
In this paper, we present the fabrication and characterization of 40 nm InAs-channel high-electron-mobility-transistor (HEMT) devices. Both DC and RF measurements were performed under various bias conditions. We have also extracted bias-dependent intrinsic device parameters to determine the optimum conditions of operation. It is concluded that a high current-gain cutoff frequency (f(T)) of 615 GHz can be achieved when the device is biased near the occurrence of impact ionization. (C) 2012 The Japan Society of Applied Physics

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