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收集所有交通大學研究人員與學生個人或團體所發表之各項學術著作,涵蓋期刊論文、教師專書、學位論文等項。;;Collections of Publications of NCTU Researchers and Students Like Journal Papers and Thesis.

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Now showing 1 - 10 of 22
  • Item type:Item,
    A 340 GHz Triple-Push Oscillator With Differential Output in 40 nm CMOS
    (2014-12-01)
    Li, Chun-Hsing
    ;
    Ko, Chun-Lin
    ;
    Kuo, Chien-Nan
    ;
    Kuo, Ming-Ching
    ;
    Chang, Da-Chiang
    A low-power triple-push oscillator with differential output is proposed in this letter. By extracting signals from the same current loop, the oscillator can naturally provide differential output without any additional active circuit or passive balun required. Therefore, the output power can be increased and the chip area and power consumption can be reduced. Realized in 40 nm CMOS technology, the proposed oscillator can oscillate at 340.6 GHz while providing equivalent isotropically radiated power (EIRP) as -21.8 dBm. The power consumption is only 34.1 mW from a 0.9 V supply. The oscillator core only occupies area of 0.028 mm(2).
  • Item type:Item,
    Miniature inductor suitable for integrated circuits
    (2006-10-12)
    Kuo, Chien-Nan
    ;
    Ma, Chien-Chia
    A miniature inductor suitable for integrated circuits comprises a semiconductor substrate having a coplanar strip line and a plurality of metal-insulator-metal (MIM) capacitors, wherein the plurality of MIM capacitors are connected between the transmission lines of the coplanar strip line in parallel, and the coplanar strip line connected with the MIM capacitors further comprises a crossed planar strip line structure or a shifted planar strip line structure. The present invention reduces the occupied area for an inductor by adding the MIM capacitors and folding the transmission lines, and alleviates the quality factor degradation of the inductor caused by substrate loss.
  • Item type:Item,
    Ultra broad-band low noise amplifier utilizing dual feedback technique
    (2007-08-02)
    Fu, Chang-Tsung
    ;
    Kuo, Chien-Nan
    This invention relates to a low noise amplifier, used in radio frequency integrated circuit design, especially low noise amplifiers for ultra broad-band wireless communication, comprising at least a transistor of the core circuit of a low noise amplifier structure, a transformer that is implemented on the chip, in order to form a dual feedback amplifier, that is, an amplifier structure comprising an inductive feedback and a capacitive feedback, wherein the capacitive feedback is used for the low and medium frequency range, while the inductive feedback is used for the high frequency range. By assembling an amplifier circuit with these two feedback paths, it is possible to provide a broadband and good impedance matching at the signal input end of the circuit. The low noise amplifier circuit structure of the present invention is able to provide optimal conditions for broadband input impedance matching and broadband noise optimum; besides significantly increasing the gain and gain flatness, there are also huge improvements to the noise performance and the cost-down on fabrication, and the energy consumption can also be maintained at a very low level.
  • Item type:Item,
    COHERENT TUNABLE FILTER APPARATUS AND WIRELESS COMMUNICATION FRONT-END CIRCUIT THEREOF
    (2009-07-02)
    Kuo, Chien-Nan
    ;
    Shih, Horng-Yuan
    ;
    Pang, Yi-Hsin
    A front-end circuit with coherent tunable filters is provided. The circuit includes a first filter, an amplifier, and a second filter. The amplifier is coupled to the first filter, and the second filter is coupled to the amplifier. Furthermore, the amplifier is placed between the first and second filters. The first filter has a first tunable intermediate frequency, and is used to filter a received signal. The amplifier is used to amplify the output of the first filter. The second filter has a second tunable intermediate frequency, and is used to filter the output of the amplifier. The first and second intermediate frequencies have a coherent-tuning relation with each other.
  • Item type:Item,
    CIRCUIT AND METHOD FOR IMPLEMENTING FREQUENCY TRIPLED I/Q SIGNALS
    (2010-05-20)
    Kuo, Chien-Nan
    ;
    Chen, Huan-Sheng
    A circuit and a method for implementing frequency tripled I/Q signals are proposed, including receiving two input I/Q signals through frequency multipliers so as to generate two frequency multiplied signals and mixing the input I/Q signals and the corresponding frequency multiplied signals through mixers for generating and outputting two I/Q signals with a frequency three times that of the input I/Q signals. The invention eliminates the requirement for high amplitude of the input signals as in the prior art and has lower power consumption and broader bandwidth and can be used as high frequency signal sources in any single chip processes.
  • Item type:Item,
    A 60 GHz Injection-Locked Frequency Tripler With Spur Suppression
    (2010-10-01)
    Kuo, Chien-Nan
    ;
    Yan, Tzu-Chao
    ;
    電子工程學系及電子研究所
    ;
    Department of Electronics Engineering and Institute of Electronics
    A 60 GHz injection-locked frequency tripler is designed to improve spectral purity with spur suppression of the fundamental and the even-order harmonics. Several circuit designs are utilized in the harmonic current injection circuit to maximize the third-order harmonic and minimize the undesired harmonic current outputs, including notch filters and a capacitive cross-coupled transistor pair. With the input signal of 0.5 dBm at 19.7 GHz, the harmonic rejection ratios of the fundamental, and the second-order achieve 31.3 dBc, and 45.8 dBc, respectively. Implemented in 0.13 mu m CMOS technology, the core circuit consumes power of 9.96 mW with 1.2 V supply voltage. The entire die occupies an area of 985 x 866 mu m(2)
  • Item type:Item,
    A 11-mW Quadrature Frequency Tripler with Fundamental Cancellation
    (2010)
    Tsai, Chien-Chung
    ;
    Chang, Derric
    ;
    Chen, Huan-Sheng
    ;
    Kuo, Chien-Nan
    ;
    電子工程學系及電子研究所
    A low-power quadrature frequency tripler is designed by using the sub-harmonic mixer configuration. The circuit is implemented in CMOS 0.180um technology. The frequency tripler consumes 11.5mW, while the output buffers consumes 43.1mW, all with supply voltage of 1.8V. The fundamental Harmonic Rejection Ratio (HRR(1)) achieves more than 35dB, and the conversion gain achieves -4.2dB at output frequency of 4.5GHz. The entire chip area occupied 1.4x1.1 mm(2).
  • Item type:Item,
    A Low-Cost DC-to-84-GHz Broadband Bondwire Interconnect for SoP Heterogeneous System Integration
    (2013-12-01)
    Li, Chun-Hsing
    ;
    Ko, Chun-Lin
    ;
    Kuo, Chien-Nan
    ;
    Kuo, Ming-Ching
    ;
    Chang, Da-Chiang
    A low-cost broadband bondwire interconnect is proposed for heterogeneous system integration. Transmission lines are incorporated with bondwires to form a two-path structure, which can effectively reduce the bondwire effect. Theoretical analysis is provided using a graphical method and it shows that the interconnect can give widest operation bandwidth from dc up to a maximum frequency f(max) if the length of the transmission lines is designed at an optimal electrical length theta(max) . In particular, theta(max) only depends on the characteristic impedance of the transmission lines. The achievable f(max) is limited by the bondwire inductance, i.e., smaller bondwire inductance is preferred to have wider operation bandwidth. An interconnect from a 0.18-mu m CMOS chip to a glass-integrated-passive-device carrier is designed to verify the proposed concept. Measured results show that the insertion loss and the return loss can be better than 3.0 and 13.4 dB, respectively, from dc to 84 GHz. The proposed interconnect shows around 3.2 times bandwidth of a single bondwire alone. To the best of authors' knowledge, this work demonstrates the bondwire interconnect with the widest operation bandwidth for heterogeneous system integration by using system-on-package reported thus far.
  • Item type:Item,
    A 0.6-V 0.33-mW 5.5-GHz Receiver Front-End Using Resonator Coupling Technique
    (2011-06-01)
    Li, Chun-Hsing
    ;
    Liu, Yen-Lin
    ;
    Kuo, Chien-Nan
    ;
    電子工程學系及電子研究所
    ;
    Department of Electronics Engineering and Institute of Electronics
    In this study, a low-power and low-voltage 5.5-GHz receiver front-end circuit is designed using a resonator coupling technique. An on-chip transformer combined with the parasitic capacitances from a low-noise amplifier (LNA), a mixer, and the transformer itself comprises two coupled resonators of the resonator coupling network (RCN). The RCN functions as a balun, and couples energy from the LNA to the mixer. Under the critical coupling condition, the RCN gives a maximal current gain at resonance frequencies, equivalent to the same level by an ideal transformer. The analysis shows that the current gain is quite tolerable to the coupling coefficient variation, an advantageous feature for on-chip transformer design. The technique is verified by the receiver front-end in 0.18-mu m CMOS technology. The RCN possess a current gain as high as 12 dB at 5.5 GHz. The measured input return loss, conversion gain, and third-order intermodulation intercept point of the entire circuit are 16 dB, 17.4 dB, and -1.5 dBm, respectively. The noise figure is 7.8 dB at the IF frequency of 1 MHz. The power consumption is only 0.33 mW from a 0.6-V supply. The required local oscillator power is only -9.5 dBm. This receiver front-end successfully demonstrates the resonator coupling technique.
  • Item type:Item,
    A Continuous-Wave THz Imaging System
    (2013)
    Pei, Ting-Hang
    ;
    Huang, Yang-Tung
    ;
    Wang, Yu-Jiu
    ;
    Chen, Wei-Zen
    ;
    Kuo, Chien-Nan
    We develop a continuous wave terehertz (THz) imaging system operating at 288 GHz. This imaging system simply consitutes three parts including the source, two optical lenses, and the detector. The entire size is smaller than the tranditional pulsed THz imaging system. In this developed system, the THz wave is generated by a horn attenna which concentrates the wave in an azimuth angle of 3 degrees similar to 5 degrees. The source originates from a singnal generator, and then the frequency increases to 288 GHz after passing through an 8X multiplier. Next, THz wave is focused by a THz lens on the test sample. By controling the sample position in the x-z plane, we can scan it pixel-by-pixel in which each step along the x- or z- axes is 0.1 mm. After penetrating the test sample, another lens collects the transmitted THz wave and focuses them into the thermal detector. This detector can disply the collected THz power. Finally, by drawing the detected power of each pixel, a transmitted-intensity figure for all pixels is obtained. The resolution of this THz imaging system is about 1 similar to 2 mm at present. We have measured human molar tooth and obtained its transmitted figures. Besides, we also develop a technology to adjust the positions of the source and detector by a system containing one laser, one beamsplitter, and two mirrors. The relative positions between the source and detector is very important. The input of the source and the output of the detector are small so that they have to aim at each other very accurately in order to collect maximum transmitted power in the detector.