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Paraffin wax passivation layer improvements in electrical characteristics of bottom gate amorphous indium-gallium-zinc oxide thin-film transistors
(2011-12-30)
Chang, Geng-Wei
;
Chang, Ting-Chang
;
Syu, Yong-En
;
Tsai, Tsung-Ming
;
Chang, Kuan-Chang
In this research, paraffin wax is employed as the passivation layer of the bottom gate amorphous indium-gallium-zinc oxide thin-film transistors (a-IGZO TFTs), and it is formed by sol-gel process in the atmosphere. The high yield and low cost passivation layer of sol-gel process technology has attracted much attention for current flat-panel-display manufacturing. Comparing with passivation-free a-IGZO TFTs, passivated devices exhibit a superior stability against positive gate bias stress in different ambient gas, demonstrating that paraffin wax shows gas-resisting characteristics for a-IGZO TFTs application. Furthermore, light-induced stretch-out phenomenon for paraffin wax passivated device is suppressed. This superior stability of the passivated device was attributed to the reduced total density of states (DOS) including the interfacial and semiconductor bulk trap densities. (C) 2011 Elsevier B.V. All rights reserved.
Low temperature synthesis and electrical characterization of germanium doped Ti-based nanocrystals for nonvolatile memory
(2011-11-30)
Feng, Li-Wei
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Chang, Chun-Yen
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Chang, Ting-Chang
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Tu, Chun-Hao
;
Wang, Pai-Syuan
Chemical and electrical characteristics of Ti-based nanocrystals containing germanium, fabricated by annealing the co-sputtered thin film with titanium silicide and germanium targets, were demonstrated for low temperature applications of nonvolatile memory. Formation and composition characteristics of nanocrystals (NCs) at various annealing temperatures were examined by transmission electron microscopy and X-ray photon-emission spectroscopy, respectively. It was observed that the addition of germanium (Ge) significantly reduces the proposed thermal budget necessary for Ti-based NC formation due to the rise of morphological instability and agglomeration properties during annealing. NC structures formed after annealing at 500 degrees C, and separated well at 600 degrees C annealing. However, it was also observed that significant thermal desorption of Ge atoms occurs at 600 degrees C due to the sublimation of formatted GeO phase and results in a serious decrease of memory window. Therefore, an approach to effectively restrain Ge thermal desorption is proposed by encapsulating the Ti-based trapping layer with a thick silicon oxide layer before 600 degrees C annealing. The electrical characteristics of data retention in the sample with the 600 degrees C annealing exhibited better performance than the 500 C-annealed sample, a result associated with the better separation and better crystallization of the NC structures. (C) 2011 Elsevier B.V. All rights reserved.
Formation and composition of titanium oxinitride nanocrystals synthesized via nitridizing titanium oxide for nonvolatile memory applications
(2011-09-01)
Feng, Li-Wei
;
Chang, Chun-Yen
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Chang, Ting-Chang
;
Tu, Chun-Hao
;
Wang, Pai-Syuan
Formation and composition analyses of titanium oxinitride nanocrystals (NCs) fabricated via treating a magnetron co-sputtered thin film of titanium and silicon dioxide with a rapid thermal annealing in nitrogen ambient were demonstrated for nonvolatile memory applications. Phase separation characteristics with different annealing conditions were examined by transmission electron microscopy and chemical bonding characteristics were confirmed by X-ray photon emission spectra. It was observed that a blanket layer composed mainly of titanium oxide was still present as annealing temperature was increased to 700 degrees C, associated with the thermodynamically stable phase of titanium oxide. Furthermore, a higher thermal treatment of 900 degrees C induced formation of a well-separated NC structure and caused simultaneously partial nitridation of the titanium oxide, thereby forming titanium oxinitride NCs. A significant capacitance-voltage hysteresis in threshold voltage shift at 1 V was easily achieved under a small sweeping voltage range of + 2 V/-2 V, and a memory window retention of 2.2 V was obtained after 10(7) s by extrapolation under a 1 s initial-program/erase condition of +5 V/-5 V, respectively. (C) 2011 Elsevier B.V. All rights reserved.
Electrical enhancement of solid phase crystallized poly-Si thin-film transistors with fluorine ion implantation
(2006)
Tu, Chun-Hao
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Chang, Ting- Chang
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Liu, Po-Tsun
;
Chen, Chih-Hung
;
Yang, Che-Yu
Solid phase recrystallized polycrystalline silicon thin-film transistors (SPC poly-Si TFTs) with fluorine ion implantation were investigated in this study. Electrical characteristics and reliability of the proposed poly-Si TFTs were improved effectively, especially for field effect mobility and off current. The fluorine-ion-implanted poly-Si TFT can suppress the hot carrier multiplication near the drain side, leading to superior endurance to electrical stress compared with conventional poly-Si TFTs. It was found that fluorine ions will pile up at the poly-Si interface during thermal annealing, without the initial deposition of pad oxide. The proposed technology is manageable and compatible with conventional poly-Si TFT fabrication. As the ion dosages increase more than 5x10(15) cm(-2), however, the electrical characteristics of poly-Si TFTs were degraded due to the increase of trap state density caused by the fluorine segregation in the poly-Si film.
Formation of germanium nanocrystals embedded in silicon-oxygen-nitride layer
(2006-07-31)
Tu, Chun-Hao
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Chang, Ting-Chang
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Liu, Po-Tsun
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Liu, Hsin-Chou
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Tsai, Chia-Chou
The formation of germanium nanocrystals embedded in silicon-oxygen nitride with distributed charge storage elements is proposed in this work. A large memory window is observed due to isolated Ge nanocrystals in the SiON gate stack layer. The Ge nanocrystals were nucleated after high temperature oxidized SiGeN layer. The nonvolatile memory with the Ge nanocrystals embedded in SiON stack layer exhibits 4 V threshold voltage shift under 10 V write operation. Also, the manufacture technology using the sequent high-temperature oxidation of the a-Si layer acting as the blocking oxide is proposed to enhance the performance of nonvolatile memory devices. (c) 2006 American Institute of Physics.
Improved memory window for Ge nanocrystals embedded in SiON layer
(2006-10-16)
Tu, Chun-Hao
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Chang, Ting-Chang
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Liu, Po-Tsun
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Liu, Hsin-Chou
;
Sze, Simon M.
The formation of germanium (Ge) nanocrystals embedded in silicon oxygen nitride (SiON) is proposed for charge storage elements in this work. The Ge nanocrystals can be nucleated after the oxidation process of silicon germanium nitride (SiGeN) layer at high temperatures. Compared to the control samples of Ge nanocrystals/SiO2/Si structure and SiON/Si stack memory, the proposed Ge nanocrystals/SiON/Si memory obtained superior memory window, even larger than the typical sum of both. It is considered that the extra interface trap states between Ge and SiON film were generated as Ge nanocrystals were embedded in SiON layer. (c) 2006 American Institute of Physics.
Improvement of hydrogenated amorphous-silicon TFT performances with low-k siloxane-based hydrogen silsesquioxane (HSQ) passivation layer
(2006-11-01)
Chang, Ta-Shan
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Chang, Ting- Chang
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Liu, Po-Tsun
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Chang, Tien-Shan
;
Tu, Chun-Hao
A low-dielectric-constant (low-k)-material siloxanebased hydrogen silsesquioxane (HSQ) is investigated as a passivation layer in bottom-gate hydrogenated amorphous-silicon thin-film transistors (a-Si: H TFTs). The low-k HSQ film passivated on TFT promotes the brightness and aperture ratio of TFT liquid-crystal display due to its high light transmittance and good planarizatiow In addition, the performance of a-Si : H TFT with HSQ passivation has been improved, compared to a conventional silicon nitride (SiNx)-passivated TFT because the hydrogen bonds of HSQ assist the hydrogen incorporation to eliminate the density of states between the back channel and passivation layer. Experimental results exhibit an improved field-effect mobility of 0.57 cm(2)/V center dot s and a subthreshold swing of 0.68 V.
Formation of germanium nanocrystals embedded in a silicon-oxygen-nitride layer
(2007)
Tu, Chun-Hao
;
Chang, Ting-Chang
;
Liu, Po-Tsun
;
Weng, Chi-Feng
;
Liu, Hsin-Chou
The formation of germanium nanocrystals embedded in silicon-oxygen-nitride with distributed charge storage elements is proposed. A large memory window was observed due to isolated Ge nanocrystals in the SiON gate stack layer. The Ge nanocrystals were nucleated after a high-temperature oxidized SiGeN layer. The Ge nanocrystals embedded in the SiON stack layer exhibited nonvolatile memory characteristics with the obvious threshold voltage shift under a bidirectional voltage sweep. Also, the manufacturing technology using the sequent high-temperature oxidation of the a-Si layer and the direct oxidation of the SiGeN layer is proposed, respectively, for the formation of a blocking oxide layer to enhance the performance of nonvolatile memory devices. The reliability characteristics, including retention time and endurance, are also advisable for the application of nonvolatile memory device. (c) 2007 The Electrochemical Society.
Improved performance of F-ions-implanted poly-Si thin-film transistors using solid phase crystallization and excimer laser crystallization
(2007-03-01)
Tu, Chun-Hao
;
Chang, Ting-Chang
;
Liu, Po-Tsun
;
Yang, Che-Yu
;
Feng, Li-Wei
Polycrystalline silicon thin-film transistors (Poly-Si TFTs) with F-ions-implantation were investigated in this study. The electrical characteristics and reliability of the F-ions-implanted poly-Si TFTs were reported for solid phase crystallization (SPC) and excimer laser crystallization (ELC) methods respectively. The thermal annealing causes F-ions to pile up at the poly-Si interface, without the initial pad oxide deposition. With the introduction of fluorine in poly-Si film, the trap state density was effectively reduced. Also, the presence of strong Si-F bonds enhances electrical endurance against hot carrier impact by using F-ions-implantation. These improvements in electrical characteristics are even obvious for the ELC poly-Si TFTs compared to the SPC ones.
Formation of stacked Ni silicide nanocrystals for nonvolatile memory application
(2007-03-12)
Chen, Wei-Ren
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Chang, Ting-Chang
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Liu, Po-Tsun
;
Lin, Po-Sun
;
Tu, Chun-Hao
The formation of stacked Ni silicide nanocrystals by using a comixed target is proposed in this letter. High resolution transmission electron microscope analysis clearly shows the stacked nanocrystals embedded in the silicon oxide. The memory window enough to define "1" and "0" states is obviously observed at low voltage programming conditions, and good data retention characteristics are exhibited for the nonvolatile memory application. A physical model is also proposed further to explain the saturation phenomenon of threshold voltage at different programming voltages with operation duration. (c) 2007 American Institute of Physics.

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