🏛️國立陽明交通大學機構典藏

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Halbleitervorrichtung und Verfahren zur Herstellung derselben
(2018-06-21)
CHANG EDWARD YI
;
LIU SHIH-CHIEN
;
HUANG CHUNG-KAI
;
WU CHIA-HSUN
;
HAN PING-CHENG
A semiconductor device includes a substrate, a channel layer, a barrier layer, a recess, a charge trapping layer, a ferroelectric material layer, a gate, a source and a drain. The channel layer is disposed on the substrate. The barrier layer is disposed on the channel layer. The barrier layer has a recess, and a portion of the barrier layer under the recess has a thickness. The source and the drain are disposed on the barrier layer. The charge trapping layer covers the bottom of the recess. The ferroelectric material is disposed on the charge trapping layer. The gate is disposed on the ferroelectric material.
跨國頂尖研究中心-國際頂尖異質整合綠色電子研究中心( IV )
(2016)
張翼
;
CHANG EDWARD YI
;
國立交通大學材料科學與工程學系（所）
高頻功率氮化銦鋁/氮化鎵高電子遷移率電晶體技術開發與研究
(2016)
張翼
;
CHANG EDWARD YI
;
國立交通大學材料科學與工程學系（所）
高效能氮化鎵電源模組之網路監控電力系統研究-子計畫一：大尺寸高功率氮化鋁鎵/氮化鎵高電子遷移率電晶體技術開發與研究(I)
(2015)
張翼
;
CHANG EDWARD YI
;
國立交通大學材料科學與工程學系（所）
高頻功率氮化銦鋁/氮化鎵高電子遷移率電晶體技術開發與研究
(2015)
張翼
;
CHANG EDWARD YI
;
國立交通大學材料科學與工程學系（所）
ENHANCEMENT-MODE HIGH-ELECTRON-MOBILITY TRANSISTOR AND THE MANUFACTURING METHOD THEREOF
(2012-02-02)
CHANG EDWARD YI
;
CHANG CHIA-HUA
;
LIN YUEH-CHIN
This invention discloses an enhancement-mode high-electron-mobility transistor and the manufacturing method thereof. The transistor comprises an epitaxial buffer layer on a substrate, a source and drain formed in the buffer layer, a PN-junction stack formed on the buffer layer and located between the source and drain, and a gate formed on the PN-junction stack, wherein the PN-junction stack is composed of alternating layers of a P-type semiconductor and an N-type semiconductor.
DEVICE HAVING SERIES-CONNECTED HIGH ELECTRON MOBILITY TRANSISTORS AND MANUFACTURING METHOD THEREOF
(2012-04-26)
CHANG EDWARD YI
;
HSU HENG-TUNG
A manufacturing method of a device having series-connected HEMTs is presented. Transistors are formed on a substrate and integratedly serial-connected as an integrated device by interconnection wires. Therefore, the voltage of the device is the sum of the voltages across each transistors so that the device can have high breakdown voltage.
ENHANCEMENT-MODE HIGH-ELECTRON-MOBILITY TRANSISTOR AND THE MANUFACTURING METHOD THEREOF
(2012-09-20)
CHANG EDWARD YI
;
Chang Chia-Hua
;
Lin Yueh-Chin
This invention discloses an enhancement-mode high-electron-mobility transistor and the manufacturing method thereof. The transistor comprises an epitaxial buffer layer on a substrate, a source and drain formed in the buffer layer, a PN-junction stack formed on the buffer layer and located between the source and drain, and a gate formed on the PN-junction stack, wherein the PN-junction stack is composed of alternating layers of a P-type semiconductor and an N-type semiconductor.
DEVICE HAVING SERIES-CONNECTED HIGH ELECTRON MOBILITY TRANSISTORS AND MANUFACTURING METHOD THEREOF
(2012-12-06)
CHANG EDWARD YI
;
HSU HENG-TUNG
A manufacturing method of a device having series-connected HEMTs is presented. Transistors are formed on a substrate and integratedly serial-connected as an integrated device by interconnection wires. Therefore, the voltage of the device is the sum of the voltages across each transistors so that the device can have high breakdown voltage.
HIGH ELECTRON MOBILITY GaN-BASED TRANSISTOR STRUCTURE
(2013-07-11)
CHANG EDWARD YI
;
CHANG CHIA-HUA
;
LIN YUEH-CHIN
;
CHEN YU KONG
;
LIU SHIH-CHIEN
A high electron mobility GaN-based transistor structure comprises a substrate, an epitaxial GaN layer formed on the substrate, at least one ohmic contact layer formed on the epitaxial GaN layer, a metallic gate layer formed on the epitaxial GaN layer, and a diffusion barrier layer interposed between the metallic gate layer and the epitaxial GaN layer. The diffusion barrier layer hinders metallic atoms of the metallic gate layer from diffusing into the epitaxial GaN layer, whereby are improved the electric characteristics and reliability of the GaN-based transistor.

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