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Analysis and design of wideband active power splitter with interleaf transmission line topology
(2019-11-01)
Huang, Ching-Ying
;
Hu, Robert
;
Niu, Dow-Chi
;
Chang, Chi-Yang
;
電機學院
This article proposes a new wideband active power splitter design where the gain cells along the input transmission line are arranged in interleaf rather than the conventional parallel style, thus the circuit's high-frequency performance can be greatly improved. Both theoretical analysis and circuit simulation have been carried out; as a demonstration, parallel and interleaf active power splitters are designed using 0.1 mu m GaAs pseudo-morphic heterostructure field effect transistors (GaAs pHEMT) process and measured on-wafer. The results clearly indicate the superiority of the interleaf topology. A 40 GHz interleaf active power splitter in 90 nm complementary metal-oxide-semiconductor (CMOS) is then presented where the magnitude and phase imbalance between the two output ports are 0.15 dB and 2.6 degrees at 20 GHz, and 0.16 dB and 14 degrees at 40 GHz. The output-port isolation is better than 30 dB across the whole frequency range.
IL analysis for 8-way power combining network in 77-110 GHz 40 nm-complementary metal-oxide-semiconductor PA design
(2019-11-01)
Huang, Ching-Ying
;
Wu, Pin-Hsuan
;
Wu, Kun-Long
;
Hu, Robert
;
Chang, Chi-Yang
In this study, the authors will investigate the insertion loss (IL) of the broadband 8-way power combiner used in their millimetre-wave power amplifier (PA) design. By treating this combiner as impedance transformer under resistor-capacitor (RC)-loading condition, both the characteristic impedance and electrical length of the constituting metal lines can be obtained, where the much shorter line length suggests wider bandwidth and lower IL. However, proper loss analysis must take into account the multi-reflection of voltage wave along these mismatched transmission lines, i.e. the use of the power attenuation expression ${\rm e}<^>{ - 2\alpha L}$e-2 alpha L is just not accurate enough. With their derived equations, it shows that the IL of their proposed 8-way combiner can be as low as 0.92 dB at 94 GHz, which is much smaller than the 1.5 dB for the conventional quarter-wavelength combiner. Mathematics for the IL of the drain-bias shunt stub and the output DC-blocking capacitor has also been derived. As a demonstration, a 77-110 GHz 40 nm-complementary metal-oxide-semiconductor PA made of cascode transistors is then designed that has more than 18 dB gain, and its OP1 dB is around 13 dBm across the whole frequency range.
Analysis of wide-IF-band 65 nm-CMOS mixer for 77-110 GHz radio-astronomical receiver design
(2019-05-01)
Huang, Ching-Ying
;
Wu, Kun-Long
;
Hu, Robert
;
Chang, Chi-Yang
;
電子工程學系及電子研究所
This manuscript presents the design of a W-band receiver in which an radio frequency-low noise amplifier (RF-LNA), a wideband mixer, intermediate frequency (IF) amplification, a local oscillator frequency (LO) tripler and a driving amplifier are all integrated into one single chip of 1050 x 820 mu m(2). To effectively extend the mixer's IF bandwidth while retaining its conversion gain, impacts of the mixing transistor's drain bias and output loading impedance are explored using a dual-modulation conversion-matrix method, which allows both the LO-induced transconductance modulation and channel-conductance modulation to be considered simultaneously. It is shown that, by merging the input capacitance of the IF amplifier into a high-impedance artificial transmission line, an actively biased mixer can have constant conversion gain over broad bandwidth. A 77-110 GHz 65 nm-complementary metal-oxide-semiconductor (CMOS) receiver with 33 GHz IF bandwidth is then designed and measured. Its conversion gain and noise figure are 10 and 20 dB, respectively, and the input-referred P1 dB is -15 dBm; the overall power consumption is 330 mW under 1.3 V drain bias.
Parallel-Coupled Filters Using Stepped-Impedance Coupled Lines
(2016-01-01)
Chen, Ting-An
;
Wei, Shih-Chiang
;
Chou, Po-Jong
;
Chang, Chi-Yang
;
電機工程學系
A stepped-impedance coupled line (SICLN) is proposed in this paper. The proposed SICLN can be equivalent to a conventional quarter-wave coupled line section at the center frequency. The proposed SICLN is applied to half-and quarter-wave parallel-coupled filters. The proposed filters show both size reduction and better spurious responses.
X-band Three-stub Filter Embedded SPDT Switch Using Packaged PIN Diodes and Novel Resonators
(2015-01-01)
Tsai, Guo-Ding
;
Chou, Po-Jung
;
Chang, Chi-Yang
;
電機工程學系
;
Department of Electrical and Computer Engineering
A Single pole double throw (SPDT) switch using the packaged PIN diodes for X-band application is proposed. The SPDT switch is embedded in two Chebyshev three-stub filters where one of the three stubs is substituted by the PIN diode and peripheral circuits. The high value of parasitic inductance in the package is absorbed by the filter with a proposed novel resonator structure. The simulated and measured results are matched well.
A W-band Quadrature Hybrid Coupled Substrate Integrated Waveguide Diplexer
(2015-01-01)
Cheng, Yu-Liang
;
Chen, Hung-Wei
;
Huang, Peng-Da
;
Chang, Chi-Yang
;
電機工程學系
A W-band quadrature hybrid coupled substrate integrated waveguide (SIW) diplexer is proposed in this paper. Instead of conventional 0.127 mm substrate for W-band circuitry, a 0.254 mm substrate is chosen for Q-value improvement. A WR-10 waveguide to 0.254 mm SIW transition is developed for measurement purpose. The diplexer comprises four Riblet short slot quadrature hybrids and two pairs of 3-pole SIW channel filters. The two passbands of the diplexer are 84 GHz 6% BW and 93 GHz 6% BW respectively. The measured results matched well with simulated ones.
33 similar to 50GHz CMOS Receiver with Wideband RF, IF and LO Chain
(2017-01-01)
Huang, Ching-Ying
;
Wu, Kung-Long
;
Hu, Robert
;
Chang, Chi-Yang
;
電子工程學系及電子研究所
This manuscript describes the Q-band 90nmCMOS receiver design where the 33 similar to 50GHz RF-LNA, actively-biased double-balanced mixer, 10GHz IF amplifier, wideband frequency tripler and power amplifier in the LO chain are all integrated into one single chip. With overall power consumption of 170mW under 1.2V bias, the measured conversion gain is 15dB, noise figure close to 8dB, inputreferred P1dB around -30dBm, and the LO-IF port isolation is more than 60dB. Therefore, it can be easily driven by an external 11 similar to 16GHz signal source and used in applications such as next-generation broadband mobile communications where several specific Q-band frequency points have been considered. However, contrary to most receiver designs where the optimization is carried out over a relatively narrow bandwidth, here the main challenge lies in how to effectively extend the RF, IF, and LO bandwidth simultaneously without rendering performance deterioration. By possessing such broadband RF, IF, and LO characteristics, this Q-band circuit is also eligible for use in radio-astronomical, atmospheric, and other scientific instrumentations.
A 34-42GHz Single-Side-Band Transmitter with Switchable VCO/PLL in 90nm-CMOS Process
(2017-01-01)
Huang, Ching-Ying
;
Wu, Kun-Long
;
Hu, Robert
;
Chang, Chi-Yang
;
電子工程學系及電子研究所
This manuscript describes a 34-42GHz single-sideband 90nm-CMOS transmitter where PLL has been integrated into the LO chain and, with I/Q input and two-stage up-conversion, a 30dB image-rejection ratio is achieved within the intended bandwidth. This transmitter's wideband tuning range is made possible by the use of additional capacitor on the VCO, and the phase noise of the resulting RF output is in the range of -70 to -90dBc/Hz at 1MHz, and all below 100dBc/Hz at 10MHz. The circuit's IF-to-RF conversion gain is 30dB, with saturated output power around 5dBm, and the total power consumption is 260mW. Through the control of the power amplifier's drain bias, a 50dB power level difference can be obtained, thus allows signal modulation and further combination with the receiver. This 1100x650um(2) transmitter can be used as a prototypical circuit to explore next-generation mobile communication and civilian radar array systems.
A Switchable Tunable Dual-Band Filter Using Varator Diodes for Tuning and Switching
(2017-01-01)
Chou, Po-Jung
;
Hu, Chiao-Yi
;
Chang, Chi-Yang
;
電機工程學系
;
Department of Electrical and Computer Engineering
A switchable tunable dual-band filter using varator diodes for band switching and frequency tuning is proposed. The tuning range of first band is from 2.3 to 2.8 GHz and second one is from 1.8 to 2.1 GHz. The proposed dual-band filter is composed of two second-order Chebyshev short-ended hairpin comb filters which embedded a pair of the varators as a switching and tuning elements. The simulated and measured results are matched well.
High Selectivity and Flat Group Delay ParallelCoupled Microstrip Bandpass Filter with Lumped Element K-Inverters
(2010-01-01)
Lin, Yun-Wei
;
Lu, Jhe-Ching
;
Chang, Chi-Yang
;
Liao, Ching-Ku
;
電信工程研究所
In this paper, high selectivity and flat group delay parallel-coupled microstrip bandpass filter with lump element Kinverter are proposed. By using delay line, cross coupling is introduced and controlled easily to generate finite transmission zeros for selectivity and flat group delay. Finally, 5th-order and 6th-order filters with high selectivity and flat group delay are given as examples.

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