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收集所有交通大學研究人員與學生個人或團體所發表之各項學術著作,涵蓋期刊論文、教師專書、學位論文等項。;;Collections of Publications of NCTU Researchers and Students Like Journal Papers and Thesis.

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Now showing 1 - 10 of 313
  • Item type:Item,
    A Novel Structural Design Serving as a Stress Relief Layer for Flexible LTPS TFTs
    (2019-01-01)
    Wang, Yu-Xuan
    ;
    Chang, Ting-Chang
    ;
    Huang, Shin-Ping
    ;
    Tai, Mao-Chou
    ;
    Zheng, Yu-Zhe
    In this work a novel device structure aiming to suppress the degradations under bending in flexible devices is demonstrated, named as a wing-shape TFT. Investigations of the electrical characteristics and reliabilities are supported by simulations, theoretical calculations, and structural discussions. First, through both electrical and mechanical stress simulation, the regions of degradation are confirmed to occur at the corner of the gate insulator. After long term mechanical stress, behaviors including an abnormal hump, serious threshold voltage (Vth) shifts, on-current increase, and off-current decrease are observed. By extending the active layer, also serving as a stress relief layer, removes the degradation regions away from the main channel. Therefore, the reliability of the devices is dramatically improved. The geometries of the wings in wing-shape TFTs are also in consideration. From results, with different wing lengths, a similar improvement of the reliability is shown, but the on current is enhanced when the wing length is extended. These phenomena are realized as a result of the difference in the effective width. The proposed wing-shape LTPS TFT has its potential and benefits for future flexible displays.
  • Item type:Item,
    Incorporation of Resistive Random Access Memory into Low-Temperature Polysilicon Transistor with Fin-Like Structure as 1T1R Device
    (1970-01-01)
    Huang, Wei-Chen
    ;
    Zheng, Hao-Xuan
    ;
    Chen, Po-Hsun
    ;
    Chang, Ting-Chang
    ;
    Tan, Yung-Fang
    In this study, a one transistor one resistor (1T1R) structure combining a fin-like low-temperature polycrystalline-silicon (LTPS) transistor and a resistive random access memory (RRAM) is successfully fabricated. For the fin-like LTPS transistor, both n-type and p-types show excellent electrical output characteristics. Fin-like structure produces more stable output characteristics. Also, the forming and current-voltage (I-V) characteristics are measured in this study, and the RRAM exhibits a forming voltage of about -1.9 V. As for the I-V switching property, the devices are stable and show excellent performance, with the set and reset voltages showing only minimal change over 100 cycles. Moreover, combining the fin-like LTPS transistor and RRAM into a 1T1R structure results in favorable operation over 100 cycles, with excellent retention and endurance. According to these results, RRAM can be successfully combined with a fin-like LTPS transistor for application in current integrated circuit processes without difficulty.
  • Item type:Item,
    Seeing pressure in color based on integration o highly sensitive pressure sensor and emission tunable light emitting diode
    (2019-11-25)
    Shen, Tien-Lin
    ;
    Chen, Chien-Tung
    ;
    Liao, Yu-Kuang
    ;
    Su, Teng-Yu
    ;
    Liu, Che-Yu
    We demonstrate a highly sensitive, low-cost, environmental-friendly pressure sensor derived from a wool-based pressure sensor with wide pressure sensing range using wool bricks embedded with a Ag nano-wires. The easy fabrication and light weight allow portable and wearable device applications. Wth the integration of a light-emitting diode possessing multi-wavelength emission, we illustrate a hybrid multi-functional LED-integrated pressure sensor that is able to convert different applied pressures to light emission with different wavelengths. Due to the high sensitivity of the pressure sensor, the demonstration of acoustic signal detection has also been presented using sound of a metronome and a speaker playing a song. This multi-functional pressure sensor can be implemented to technologies such as smart lighting, health care, visible light communication (VLC), and other internet of things (IoT) applications. (C) 2019 Optical Society of America under the terms of the OSA Open Access Publishing Agreement
  • Item type:Item,
    Analysis of Negative Bias Temperature Instability Degradation in p-Type Low-Temperature Polycrystalline Silicon Thin-Film Transistors of Different Grain Sizes
    (2019-11-01)
    Tu, Hong-Yi
    ;
    Tsao, Yu-Ching
    ;
    Tai, Mao-Chou
    ;
    Chang, Ting-Chang
    ;
    Tsai, Yu-Lin
    This letter investigates degradation after negative bias temperature instability (NBTI) stress applied to LTPS TFTs with different polycrystalline-silicon grain sizes. The initial characteristics of the LTPS TFTs are similar regardless of grain size; however, we observed a different degree of degradation after NBTI depending on grain size. In general, after NBTI, both grain boundary traps and interface traps were generated. We found that the degree of NBTI degradation is dominated by the concentration of grain boundary traps, which themselves are a result of the different grain sizes that occur due to excimer laser annealing energy. At initial, dangling bonds in the grain boundaries and at the interface are passivated by hydrogen atoms, hence the initial characteristics are similar. Since the large grain of poly-Si initially generates more dangling bonds in the grain boundaries, after NBTI, hydrogen depassivation generates more grain boundary traps and causes much more serious degradation in device performance.
  • Item type:Item,
    Overcoming Limited Resistance in 1T1R RRAM Caused by Pinch-Off Voltage During Reset Process
    (2019-11-01)
    Zheng, Hao-Xuan
    ;
    Chen, Min-Chen
    ;
    Chang, Ting-Chang
    ;
    Su, Yu-Ting
    ;
    Chen, Wen-Chung
    This article explains the difference in the reset processes between single RRAM and 1T1R RRAM structures. In the single RRAM, as the reset voltage increases, the off-state resistance increases. This is a normal RRAM operation. However, in the 1T1R structure, the reset voltage increases while the OFF-state resistance does not increase. This may be caused by either current or voltage being insufficient to switch the RRAM to its higher resistance state. The measurements of real voltage indicate that the insufficient voltage is in fact the main cause. For the 1T1R RRAM structure, if it is to be reset to a higher resistance state, it is best done by increasing the gate voltage to increase the OFF-state resistance. Therefore, we provide a method to reduce the misjudgment in the array, and it would be beneficial for the development of high-density memory.
  • Item type:Item,
    Abnormal C-V Hump Effect Induced by Hot Carriers in Gate Length-Dependent p-Type LTPS TFTs
    (2019-11-01)
    Huang, Shin-Ping
    ;
    Chen, Po-Hsun
    ;
    Tsao, Yu-Ching
    ;
    Chen, Hong-Chih
    ;
    Zheng, Yu-Zhe
    We investigate the abnormal current-voltage (C-V) hump effect of p-type low-temperature polysilicon (LTPS) thin-film transistors (TFTs) which have undergone high current operations. Experimental results indicate localized electron trapping in the gate insulator (GI), which is carried out near the drain. The ON-current ( ${I}_{ \mathrm{\scriptscriptstyle ON}}$ ) enhancement is due to the reduction of effective length, and the OFF-current ( ${I}_{ \mathrm{\scriptscriptstyle OFF}}$ ) decrease as the electron tunneling path distance increases. These can be observed after hot carrier stress in current characteristics. The C-V measurements demonstrate that the threshold voltage ( ${V}_{\text {th}}$ ) shift is associated with the gate length. In addition, capacitance-voltage measurements also show that this localized trapping region remains the same in length, regardless of channel length. Hence, a model is proposed to explain how the electric field, which is gate length-dependent, affects the source side of the device, and then lowers the source barrier height. This leads to bulk leakage, which causes the subthreshold swing degradation at device scale down.
  • Item type:Item,
    Investigation of the Capacitance-Voltage Electrical Characteristics of Thin-Film Transistors Caused by Hydrogen Diffusion under Negative Bias Stress in a Moist Environment
    (2019-10-30)
    Chen, Hong-Chih
    ;
    Kuo, Chuan-Wei
    ;
    Chang, Ting-Chang
    ;
    Lai, Wei-Chih
    ;
    Chen, Po-Hsun
    In this study, the impact of moisture on the electrical characteristics of an amorphous In-Ga-Zn-O thin-film transistor (a-IGZO TFT) was investigated. In commercial applications of such TFTs, high stability and quality performance in humid environments are essential. During TFT operation under ambient moisture, the electrolysis of water molecules occurs via the tip electric field effect. Hydrogen diffuses from the etch-stop layer or back-channel into the main channel under a negative electric field. The hydrogen atoms act as shallow donors (which causes the carrier concentration in the channel to rise), causing the threshold voltage (V-TH) to shift in the negative direction. Hydrogen diffusion from the overlap of the source/drain and gate electrodes to the channel center caused by the tip electric field induces a significant barrier lowering and V-TH shifts in a short-channel device. However, under negative bias stress (NBS) in ambient moisture, the negative V-TH shift is more obvious in short- than in long-channel devices, indicating suppressed hydrogen diffusion in long-channel devices. This is attributed to the electrolysis of water by the tip electric field at the source, drain, and gate electrodes, which causes hydrogen to diffuse to the center of the channel. Here, a novel physical model of the capacitance-voltage (C-V) electrical property changes under ambient moisture is proposed, based on the early appearance of abnormalities in the C-V measurements. The electrolysis of water caused by the tip electric field and electrical abnormalities caused by hydrogen diffusion into the a-IGZO active layer are explained by this model. A secondary-ion mass spectrometry analysis shows that hydrogen content in the channel generally increases under NBS in ambient moisture. The degradation behavior due to moisture in a-IGZO is clarified. Thus, inhibiting the tip electric field may benefit future flexible-display and gas-sensing applications.
  • Item type:Item,
    Impact of Dehydrogenation Annealing Process Temperature on Reliability of Polycrystalline Silicon Thin Film Transistors
    (2019-10-01)
    Huang, Shin-Ping
    ;
    Chen, Po-Hsun
    ;
    Chen, Hong-Chih
    ;
    Zheng, Yu-Zhe
    ;
    Chu, Ann-Kuo
    This letter investigates variations in polycrystalline silicon thin film transistor (TFT) performance under illumination and negative bias temperature instability (NBTI) tests due to different dehydrogenation annealing temperatures during the fabrication process. The depth of the density of state (DOS) in polysilicon can be indirectly determined by the TFT response to light illumination, since dangling bonds act as recombination centers. The electrical characteristics of TFTs after undergoing NBTI can also be indicative of the bonding type of silicon atoms. By analyzing the results of these reliability tests, the type of DOS can be clarified, which is beneficial for realizing the relationship between performance and reliability.
  • Item type:Item,
    The Effect of Humidity on Reducing Forming Voltage in Conductive-Bridge Random Access Memory With an Alloy Electrode
    (2019-10-01)
    Lin, Shih-Kai
    ;
    Chen, Min-Chen
    ;
    Chang, Ting-Chang
    ;
    Lien, Chen-Hsin
    ;
    Chang, Jing-Shuen
    This letter investigates Au30Ag70 (alloy electrode)/SiO2/TiN conductive-bridge random access memory (CBRAM) to verify the influence of ambient conditions on forming voltage (V-F) and the location of galvanic reaction. Previous literature demonstrates that the galvanic reaction in CBRAM with an alloy electrode results in a lower V-F. In this work, a higher environmental H2O concentration results in a decrease in V-F. From this change in VF, we infer that environmental H2O concentration influences the amount of galvanic reaction. Moreover, we verify the location of the galvanic reaction by varying electrode thickness. Finally, we propose a physical model to explain our observations.
  • Item type:Item,
    Improving Reliability of High-Performance Ultraviolet Sensor in a-InGaZnO Thin-Film Transistors
    (2019-09-01)
    Tsai, Yu-Lin
    ;
    Chien, Yu-Chieh
    ;
    Chang, Ting-Chang
    ;
    Tsao, Yu-Ching
    ;
    Tai, Mao-Chou
    High-performance ultraviolet (UV) sensors using amorphous indium gallium zinc oxide thin-film transistors (a-IGZO TFTs) can detect I-ON/I-OFF ratio up to 10(6) and match the a-IGZO panel process. However, it has a reliability issue under long-term detection. When the top gate length of the dual gate TFT is small, it is twice as reliable as a TFT where the top gate fully covers the device. The electrical properties of the device correspond to the a-IGZO energy band, such that the top gate length was positively related to the underlying energy band diagram. The integrated systems engineering technology computer aided design (ISE-TCAD) electric field simulations show that the etch stop layer (ESL) electric field is weak in the small top gate device. This means that it is difficult for the holes to either be trapped in the ESL or to generate ionized oxygen vacancies.