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Item type:Item, Characteristic Fluctuations of Dynamic Power Delay Induced by Random Nanosized Titanium Nitride Grains and the Aspect Ratio Effect of Gate-All-Around Nanowire CMOS Devices and Circuits(2019-05-01) ;Li, Yiming ;Chen, Chieh-Yang ;Chuang, Min-Hui ;Chao, Pei-Jung電機工程學系In this study, we investigate direct current (DC)/alternating current (AC) characteristic variability induced by work function fluctuation (WKF) with respect to different nanosized metal grains and the variation of aspect ratios (ARs) of channel cross-sections on a 10 nm gate gate-all-around (GAA) nanowire (NW) metal-oxide-semiconductor field-effect transistor (MOSFET) device. The associated timing and power fluctuations of the GAA NW complementary metal-oxide-semiconductor (CMOS) circuits are further estimated and analyzed simultaneously. The experimentally validated device and circuit simulation running on a parallel computing system are intensively performed while considering the effects of WKF and various ARs to access the device's nominal and fluctuated characteristics. To provide the best accuracy of simulation, we herein calibrate the simulation results and experimental data by adjusting the fitting parameters of the mobility model. Transfer characteristics, dynamic timing, and power consumption of the tested circuit are calculated using a mixed device-circuit simulation technique. The timing fluctuation mainly follows the trend of the variation of threshold voltage. The fluctuation terms of power consumption comprising static, short-circuit, and dynamic powers are governed by the trend that the larger the grain size, the larger the fluctuation.Item type:Item, On Statistical Variation of MOSFETs Induced by Random-Discrete-Dopants and Random-Interface-Traps(2012) ;Li, Yiming ;Su, Hsin-Wen ;Chen, Chieh-Yang ;Cheng, Hui-WenChen, Yu-YuIn this work, we statistically study characteristic fluctuation of 16-nm-gate high-kappa/metal gate (HKMG) MOSFETs by random-discrete-dopants (RDDs) inside silicon channel and random-interface-traps (RITs) at high-kappa/silicon interface. Randomly generated devices with three-dimensional (3D) RDDs inside device channel and 2D RITs at HfO2/Si interface are incorporated into quantum mechanically corrected 3D device simulation. Device characteristics, as influenced by different degrees of fluctuation, are discussed in relation to RITs near the source and drain ends, and RDDs near the device channel surface and silicon substrate. Characteristic fluctuations are affected to different extents by the random combinatorial RDDs and RITs. Nonlinearly correlated RDDs and RITs further violate the statistical assumption of independent identical distributions between the RDDs- and RITs-induced random variables. Consequently, for the studied 16-nm-gate HKMG MOSFETs, the threshold voltage fluctuation induced by the combined RDs and ITs is less than their statistical sum due to local interaction of surface potentials resulting from the RDDs and RITs simultaneously. In contrast to RDDs fluctuation, the screening effect of device\'s inversion layer cannot effectively screen potential\'s variation resulting from RITs; thus, devices still have noticeable gate capacitance characteristic fluctuation under high gate bias.