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Sensor Abnormal Detection and Recovery Using Machine Learning for IoT Sensing Systems
(2019-01-01)
Tsai, Feng-Ke
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Chen, Chien-Chih
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Chen, Tien-Fu
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Lin, Tay-Jyi
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資訊工程學系
In sensing systems in various environments, such as environmental monitoring and smart power grid systems, sensors are usually unreliable due to improper calibration, low battery levels or hardware failures of the devices. Unreliability may cause users to make erroneous decisions or inaccurate analysis. In this paper, we propose a detect system architecture to avoid the abnormality among the sensors based on machine learning. The detection mechanism has to be in real-time by exploring the correlation among the sensors, and predicting the supplemental values via other correlated sensors. We analyze the fault data pattern in order to classify the fault type of faulty sensors and also to recover the faulty sensors for improving the reliability of sensing systems.
Accelerating R Data Analytics in IoT Edge Systems by Memory Optimization
(2017-01-01)
Liou, De-Yin
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Chen, Chien-Chih
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Chen, Tien-Fu
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Lin, Tay-Jyi
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資訊工程學系
With the number and variety of IoT devices increasing, a large amount of data have to be moved to the cloud, resulting into unpredictable latency from limitation of network bandwidth. R language, the most popular analytic tool, has a serious bottleneck, memory garbage collection, which will become even worse problem at the edge systems with limited memory resources. Processing a large amount of dynamic objects and high percentage of LLC misses with significantmiss penalty are the two key issues in the R execution environment. In this paper, we propose a Partially Parallel Garbage Collection to improve the waiting time during garbage collection; and a centralized memory allocation mechanism to reduce miss penalty that is caused by the high percentage of LLC misses. Our optimizations can bring benefits to those machine learning algorithms that spend most of time in R for processing large data list at the edge systems.
How Well Can We Extract the Permanent Displacement from Low-Cost MEMS Accelerometers?
(2017-11-01)
Jan, Jyh Cherng
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Chao, Wei-An
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Wu, Yih-Min
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Chen, Chien-Chih
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Lin, Cheng-Horng
Following the recent establishment of a high-density seismic network equipped with low-cost micro-electro-mechanical system (MEMS) P-wave-alert-device (P-Alert) by the earthquake early warning (EEW) research group at the National Taiwan University, a large quantity of strong-motion records from moderate-magnitude earthquakes (M-L > 6) around Taiwan has been accumulated. Using a data preprocessing scheme to recover the dynamic average embedded within the P-Alert data, we adopted an automatic baseline correction approach for the P-Alert accelerograms to determine the coseismic deformation (Cd). Comparisons between the Cd values determined using global positioning system (GPS) data, strong-motion records from the P-Alert network, and data from the Taiwan Strong Motion Instrumentation Program (TSMIP) demonstrates that the near-real-time determination of Cd values (>2 cm), which provide crucial information for seismic hazard mitigation, is possible using records from low-cost MEMS accelerometers.
Cross-Layer Dynamic Prefetching Allocation Strategies for High-Performance Multicores
(2013-01-01)
Peng, Yin-Chi
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Chen, Chien-Chih
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Chang, Chia-Jung
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Chen, Tien-Fu
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Yew, Pen-Chung
For the last decade, there have been varying techniques for hardware prefetchers to improve the system performance. However, due to limited space and bandwidth in a multicore system, the prefetching data fetched by prefetcher may pollute L1 cache even though the data is useful, thus resulting into significant performance degradation. Most contemporary multicore systems simply disable prefetching to avoid unexpected contention. This paper proposes a cross-layer and dynamic Prefetch Allocation Management (PAM) to provide better caching strategies in a parallel environment. Our approach has two main mechanisms, targeting at the different prefetch degree and location choices to minimize the cache pollution and contention. Across a variety of SPLASH2 and PARSEC benchmark, our PAM approach can contribute up to 12% of performance improvement on a 4-core multicore system compared to the static prefetcher configuration and also saves 9.1% of the memory bandwidth consumption of memory system.
Growth of GaN on {12(3)over-bar5}-like Facets of Patterned Sapphire Substrate
(2017-01-01)
Wu, Pei-Yu
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Chen, Chien-Chih
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Huang, Chia-Yen
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Kuo, Hao-Chung
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Lin, Kun-Lin
GaN has been grown on wet-etched patterned sapphire substrate (PSS) by metal-organic chemical vapor deposition. It has been found that GaN was initiated not only from bottom c-facet but also from E {12 (3) over bar5} facets of hexagonal patterns/pyramids. In this study, a vacancy-PSS on c-plane sapphire was used to investigate the growth of GaN on the E-like facets (E1 and E2) of distorted pyramids. The results show that the orientation relationship between E1-GaN and sapphire is ((11) over bar2 (6) over bar) GaN // ((1) over bar 10 (2) over bar)(sapphire) and [11 (21) over bar] GaN // [11 (2) over bar0](sapphire). At the same time, that between E2-GaN and sapphire is (01 (14) over bar) GaN // (3 (3) over bar0 (6) over bar) sapphire and [02 (2) over bar1] GaN // [11 (2) over bar0] sapphire. (C) 2017 The Electrochemical Society. All rights reserved.
Leak Stopper: An Actively Revitalized Snoop Filter Architecture with Effective Generation Control
(2017-05-01)
Peng, Yin-Chi
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Chen, Chien-Chih
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Tsai, Hsiang-Jen
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Yang, Keng-Hao
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Huang, Pei-Zhe
To alleviate high energy dissipation of unnecessary snooping accesses, snoop filters have been designed to reduce snoop lookups. These filters have the problem of decreasing filtering efficiency, and thus usually rely on partial or whole filter reset by detecting block evictions. Unfortunately, the reset conditions occur infrequently or unevenly (called passive filter deletion). This work proposes the concept of revitalized snoop filter (RSF) design, which can actively renew the destination filter by employing a generation wrapping-around scheme for various reference behaviors. We further utilize a sampling mechanism for RSF to timely trigger precise filter revitalizations, so that unnecessary RSF flushing can be minimized. The proposed RSF can be integrated to various existent inclusive snoop filters with only a minor change to their designs. We evaluate our proposed design and demonstrate that RSF eliminates 58.6% of snoop energy compared to JETTY on average while inducing only 6.5% of revitalization energy overhead. In addition, RSF eliminates 45.5% of snoop energy compared to stream registers on average and only induces 2.5% of revitalization energy overhead. Overall, these RSFs reduce the total L2 cache energy consumption by 52.1% (58.6% - 6.5%) as compared to JETTY and by 43% (45.5% - 2.5%) as compared to stream registers. Furthermore, RSF improves the overall performance by 1% to 1.4% on average compared to JETTY and stream registers for various benchmark suites.
A Flexible Wildcard-Pattern Matching Accelerator via Simultaneous Discrete Finite Automata
(2017-12-01)
Tsai, Hsiang-Jen
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Chen, Chien-Chih
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Peng, Yin-Chi
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Tsao, Ya-Han
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Chiang, Yen-Ning
Regular expression matching becomes indispensable elements of Internet of Things network security. However, traditional ternary content addressable memory (TCAM) search engine is unable to handle patterns with wildcards, as it precisely tracks only one active state with single transition. This paper proposes a promising simultaneous pattern matching methodology for wildcard patterns by two separated engines to represent discrete finite automata. A key preprocessing to encode possible postfix pattern by a unique key ensures that follow-up patterns can accurately traverse all possible matches with limited hardware resources. This approach is practical and scalable for achieving good performance and low space consumption in network security, and it can be applicable to any regular expressions even with multiwildcard patterns. The experimental results demonstrate that this scheme can efficiently and accurately recognize wildcard patterns by simultaneously tracking only two active states. By adopting SRAM TCAM in the proposed architecture, the energy consumption is reduced to around 39%, compared with the energy consumption using a computing system that contains a large memory lookup and comparison overhead.
Lifetime-aware LRU Promotion Policy for Last-level Cache
(2015)
Wu, Hong-Yi
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Chen, Chien-Chih
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Tsai, Hsiang-Jen
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Peng, Yin-Chi
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Chen, Tien-Fu
The traditional LRU replacement policy is susceptible to memory-intensive workloads with large non-reused data like thrashing applications and scan applications. For such workloads, the majority of cache blocks don\'t get any cache hits during residing in the cache. Cache performance can be improved by reducing the interference from non-reused data. Therefore, the lifetime of other blocks is increased and it can contribute to cache hit. We propose a Lifetime-aware LRU Promotion Policy and show that changing the promotion policy can effective reduce cache miss in the last-level cache. Our promotion policy dynamically adjusts promotion strategy and increases the lifetime for useful cache blocks. The experimental results show that our proposal reduces the average MPKI by 6% and 9% over EAF and DIP, respectively. In multicore, we also improve the performance and reduce the MPKI.
Adaptive Granularity and Coordinated Management for Timely Prefetching in Multi-Core Systems
(2015)
Chang, Chia-Jung
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Peng, Yin-Chi
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Chen, Chien-Chih
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Chen, Tien-Fu
;
Yew, Pen-Chung
For the last decade, there have been varying techniques for hardware prefetching to improve the system performance. However, untimely prefetching may pollution caches and resulting into significant performance degradation. In this work, we introduce an Adaptive Granularity and coordinated Prefetching (AGP) that consists of a coarse-grained and fine-grained prefetched mechanism to provide a better caching environment for parallel applications. AGP targets on the degree-adjusting and location-choosing and tries to minimize the influence caused by prefetcher for each core. AGP could produce more timely prefetched requests reducing the cache pollutions and contentions. Across a variety of PARSEC benchmarks, AGP can contribute 6.5% (up to 36%) of performance improvement on a 4-core multicore system compared to the non-prefetching.
Growth of GaN on Patterned Sapphire Substrate with High-Index Facets
(2015-01-01)
Chang, Sheng-Chieh
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Chen, Chien-Chih
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Chang, Tsu-Chi
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Lin, Kun-Lin
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Lu, Tien-Chang
Periodic pyramidal array patterned sapphire substrate (PSS) with various inclined facets was fabricated by wet etching. It was found that {3 (4) over bar 17}, {4 (1) over bar(3) over bar 18}, and {12 (3) over bar5} facets are exposed on the PSS structure after etching. GaN grown on the PSS by metal-organic chemical vapor deposition was found to have a semi-polar orientation by structural characterization with scanning and transmission electron microscopy. Also, the results show that GaN is mainly grown on the {12 (3) over bar5} sapphire facet with the orientation relationship between GaN and sapphire as(01 (1) over bar(4) over bar)(GaN) // (3 (3) over bar0 (6) over bar)(sapphire) and [02 (2) over bar1](GaN) // [11 (2) over bar0](sapphire), and the dislocation density in the grown GaN decreased with thickness. In addition, photoluminescence and catholuminescence measurements show only strong near-band-edge emission from the semi-polar GaN on the {12 (3) over bar5} sapphire facet. (C) 2015 The Electrochemical Society. All rights reserved.

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