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A Model for Neutral Defect Limited Electron Mobility in Strained-Silicon Inversion Layers
(2017-03-01)
Hsieh, Shang-Hsun
;
Chen, Ming-Jer
;
電子工程學系及電子研究所
;
Department of Electronics Engineering and Institute of Electronics
On the strained silicon metal-oxide-semiconductor field-effect transistors (MOSFETs), we show how to derive a formalism dealing with the scattering of a 2-D electron by a neutral defect. The corresponding neutral defect limited inversion-layer electron mobility, mu(n), is calculated in the momentum relaxation time approximation. The calculated results lead to a new analytical model: mu(n) = cN(n)(-1) where N-n is the neutral defect density per unit area and c is the coefficient independent of the inversion-layer density, the strain, and the temperature. The validity and applicability of the model are confirmed by citing three independent experiments on strained silicon MOSFETs undergoing different implantation sources and different annealing budgets. Importantly, this paper clarifies for the first time that strain will not change neutral defect limited mobility unless changing the neutral defect density. This reasonably explains the two experimental observations during implantation and annealing: 1) the implantation-induced strain relaxation in strained sample does not occur and 2) the neutral defect density is much higher in strained sample than in unstrained sample.
An Extreme Surface Proximity Push for Embedded SiGe in pMOSFETs Featuring Self-Aligned Silicon Reflow
(2010-09-01)
Lin, Da-Wen
;
Chen, Chien-Liang
;
Chen, Ming-Jer
;
Wu, Chung-Cheng
;
電子工程學系及電子研究所
This letter proposes a novel process to modulate the distance, or proximity, between the tip of embedded silicon-germanium (e-SiGe) and the channel region in pMOSFETs. Traditionally, sophisticated etching treatment is adopted in a spacer structure; however, process-induced variation in the e-SiGe proximity may lead to serious variation in pMOSFET performance. In this letter, an extremely close proximity is achieved using self-aligned silicon reflow (SASR) in hydrogen ambient. As opposed to conventional approaches which have e-SiGe proximity determined by spacer width, the tip of e-SiGe with SASR can be positioned flush with the gate edge, as corroborated by both the TEM analyses and TCAD simulation. A significant improvement in pMOSFET performance is also measured.
Gate Direct Tunneling Current in Uniaxially Compressive Strained nMOSFETs: A Sensitive Measure of Electron Piezo Effective Mass
(2011-01-01)
Lee, Wei-Han
;
Chen, Ming-Jer
;
電子工程學系及電子研究所
;
Department of Electronics Engineering and Institute of Electronics
Currently, both the band-structure calculation and the mobility measurement are used to assess the electron piezo-effective-mass coefficients in strained nMOSFETs. In this paper, we present a new experimental method through a fitting of the strain-altered electron gate direct tunneling current. The core of this method lies in the sensitivity of the direct tunneling to the position of the subband level in the presence of the electron piezo-effective-mass coefficients. First, a correction-coefficient generating expression is systematically constructed to compensate for the error in the subband levels due to the use of a triangular potential approximation. Then, with the known deformation potential constants and uniaxially compressive stress in the channel as inputs, a strain quantum simulator is carried out. The resulting gate direct tunneling current is used to fit experimental data, thus leading to the values of the piezo-effective-mass coefficients associated with the twofold and fourfold valleys. The comparison of the extracted piezo-effective-mass coefficients to those published in the literature is made.
Plasmons-Enhanced Minority-Carrier Injection as a Measure of Potential Fluctuations in Heavily Doped Silicon
(2014-07-01)
Chen, Ming-Jer
;
Chen, Chuan-Li
;
Hsieh, Shang-Hsun
;
Chang, Li-Ming
;
電子工程學系及電子研究所
Well-known apparent electrical silicon bandgap narrowing in a heavily doped region of a bipolar transistor is observed by means of an enhanced minority-carrier injection experiment. In the region of interest, plasmons-induced potential fluctuations are existent in nature and hence constitute the origin of apparent bandgap narrowing. In this letter, we extract the underlying potential fluctuations directly from the enhanced minority-carrier injection experiment published in the literature. The core of the extraction lies in a combination of the two existing theoretical frameworks. First, the Gaussian distribution can serve as a good approximation of potential fluctuations. Second, no change can be made in the real bandgap between fluctuating conduction-and valence-band edges. Extracted potential fluctuations come from plasmons, as verified by our published temperature dependences of plasmons limited mobility in the inversion layer of MOSFETs as well as theoretical calculation results on bulk silicon. More importantly, this letter can deliver potential applications in the modeling and simulation area of nanoscale FETs (MOSFETs, FinFETs, and so forth) and bulk semiconductors.
A Statistical Model for the Headed and Tail Distributions of Random Telegraph Signal Magnitudes in Nanoscale MOSFETs
(2014-07-01)
Chen, Ming-Jer
;
Tu, Kong-Chiang
;
Wang, Huan-Hsiung
;
Chen, Chuan-Li
;
Lai, Shiou-Yi
Trapping-detrapping of a single electron via an individual trap in metal-oxide-semiconductor field-effect transistor (MOSFET) gate dielectric constitutes two-level random telegraph signals. Recent 3-D technology computer-aided design (TCAD) simulations, on an individual MOSFET, revealed that with the position of the trap as a random variable, resulting random telegraph signals relative magnitude Delta I-d/I-d in the subthreshold current at low drain voltage can have two distinct distributions: a headed one for a percolation-free channel and a tail one for a percolative channel. The latter may be effectively treated by a literature formula: (Delta I-d/I-d) = (I-loc/I-d)(2), where I-loc is the local current around the trap. In this paper, we show how to make this formula practically useful. First, we conduct 3-D TCAD simulations on a 35 x 35-nm(2) channel to provide Delta I-d/I-d for a few positions of the trap. This leads to a new statistical model in closed form, which can reproduce headed distributions. Straightforwardly, key criteria are drawn from the model, which can act as guidelines for the adequate use of the I-loc/I-d formula. Extension to threshold voltage shift counterparts, from subthreshold through transition to inversion, is successfully achieved. Importantly, use of the model may overcome the drawbacks of the statistical experiment or simulation in the field.
Probing Long-Range Coulomb Interactions in Nanoscale MOSFETs
(2013-12-01)
Chen, Ming-Jer
;
Chang, Li-Ming
;
Wei, Sih-Yun
;
Chen, Wan-Li
;
Yeh, Ting-Hsien
We have recently experimentally probed long-range Coulomb interactions due to plasmons in polysilicon gate of long-channel (1 mu m) MOSFETs. In this letter, we further probe those due to plasmons in the highly doped source and drain. Test vehicles include four more samples from the same manufacturing process but with small channel lengths (down to 33 nm). I-V's of devices are measured at two drain voltages of 0.05 and 1 V, in a temperature range of 292-380 K. Inverse modeling technique is applied to furnish calibrated doping profiles. The inversion layer electron effective mobility is thereby extracted, showing a decreasing trend with decreasing channel length. Such differences reflect more additional scatterers in the shorter devices. Mobility components limited by these additional scatterers are assessed using Matthiessen's rule. From the extracted temperature dependencies, we infer that the strength of source/drain plasmons increases with decreasing channel length. The errors of Matthiessen's rule are adequately dealt with. Corroborative evidence is given as well.
Error-Free Matthiessen's Rule in the MOSFET Universal Mobility Region
(2013-02-01)
Chen, Ming-Jer
;
Lee, Wei-Han
;
Huang, Yi-Hui
;
電子工程學系及電子研究所
;
Department of Electronics Engineering and Institute of Electronics
Through the experimentally validated inversion-layer mobility simulation, we devise an error-free version of Matthiessen's rule for a single-gate n-channel bulk MOSFET in the universal mobility region. The core of the new rule lies in a semi-empirical model, which explicitly expresses the errors due to the conventional use of Matthiessen's rule as a function of both the lowest subband population and the relative strength of individual mobility components. The model holds under practical conditions (with temperatures up to 400 K) and in a broad range of substrate doping concentrations (10(14) to 10(18) cm(-3)). To make the error-free proposal more general, we elaborate on several issues, including strain, impurity Coulomb scattering, and remote scattering. The thin-film case can be treated accordingly.
Effect of Strained k . p Deformation Potentials on Hole Inversion-Layer Mobility
(2013-04-01)
Chen, Ming-Jer
;
Lee, Chien-Chih
;
Chen, Wan-Li
;
電子工程學系及電子研究所
;
Department of Electronics Engineering and Institute of Electronics
In the literature dedicated to strained p-type metal-oxide-semiconductor field-effect transistor inversion-layer mobility calculation via a k . p valence-band structure, three key strain-related material parameters, namely, the Bir-Pikus deformation potentials a(upsilon), b, and d, were widespread in magnitude. To improve such large discrepancies, in this paper, we conduct sophisticated calculations on < 110 >/(001) and < 110 >/(110) hole inversion-layer mobility for gigapascal-level uniaxial stresses along each of three crystallographic directions. The screening effect on surface roughness scattering is taken into account. We find that, to affect the calculated hole mobility enhancement, a(upsilon) is weak, b is moderate, and d is strong, particularly for the uniaxial compressive stress along the < 110 > direction. This provides experimental guidelines for an optimal determination of the primary factor, i.e., d, and the secondary factor, i.e., b, with the commonly used values for a(upsilon). The result remains valid for varying surface roughness parameters and models and is supported by recent first-principles and tight-binding calculations. Thus, the strained k . p valence-band structure with the optimized deformation potentials can ensure the accuracy of the calculated transport properties of 2-D hole gas under stress.
Evidence for the Fourfold-Valley Confinement Electron Piezo-Effective-Mass Coefficient in Inversion Layers of < 110 > Uniaxial-Tensile-Strained (001) nMOSFETs
(2012-06-01)
Chen, Ming-Jer
;
Lee, Wei-Han
;
電子工程學系及電子研究所
;
Department of Electronics Engineering and Institute of Electronics
We have recently experimentally extracted the piezo-effective-mass coefficients of 2-D electrons via the gate tunneling current of (001) n-channel metal-oxide-semiconductor field-effect transistors under < 110 > uniaxial compressive stress. The results pointed to the existence of a piezo-effective-mass coefficient around the fourfold conduction-band valley in the out-of-plane (quantum confinement) direction. To strengthen this further, here, we provide extra evidence. First, explicit guidelines are drawn to distinguish all the piezo-effective-mass coefficients. Then, a self-consistent strain quantum simulation is executed to fit literature data of both the mobility enhancement and gate current suppression in the uniaxial tensile stress situation. It is found that neglecting the fourfold-valley out-of-plane piezo-effective-mass coefficient, as in existing band structure calculations, only leads to a poor fitting.
Evidence for a Very Small Tunneling Effective Mass (0.03m(0)) in MOSFET High-k (HfSiON) Gate Dielectrics
(2012-04-01)
Chen, Ming-Jer
;
Hsu, Chih-Yu
;
電子工程學系及電子研究所
;
Department of Electronics Engineering and Institute of Electronics
We have recently conducted experimental and modeling tasks on TaC/HfSiON/SiON n-type MOSFETs, leading to an effective mass of 0.03m(0) for 2-D electrons tunneling in high-k HfSiON dielectrics. In this letter, we present extra evidence obtained from complementary MOSFETs undergoing the same TaC/HfSiON/SiON processing, which shows that such a very small tunneling effective mass is existent not only for 3-D electrons but also for 2-D holes. This new finding is very important because it can substantially enhance the current understanding of gate tunneling leakage suppression in metal-gate high-k MOSFETs.

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