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Effect of ELA Energy Density on Self-Heating Stress in Low-Temperature Polycrystalline Silicon Thin-Film Transistors
(2020-08-01)
Huang, Shin-Ping
;
Chen, Hong-Chih
;
Chen, Po-Hsun
;
Zheng, Yu-Zhe
;
Chu, Ann-Kuo
The extent of the poly-silicon crystalline protrusion, a result of differences in excimer laser annealing (ELA), affects the performance and reliability of thin-film transistors (TFTs). This study investigates the degradation mechanism of the low-temperature polycrystalline silicon (LTPS) TFT devices with differences in crystalline protrusion under self-heating stress (SHS). Higher ELA energy will induce higher protrusion height in the interface between the poly-silicon and gate insulator (GI). This surface morphology leads to serious charge trapping into the GI layers; in contrast, the smallest degradation after SHS can be seen in the devices with the lowest protrusion height. This indicates that the degradation is caused by the surface morphology between the poly-Si and GI interface. In addition, the COMSOL simulation results confirm that the large electric field in the GI layer appears in the rough surface morphology devices; therefore, choosing the appropriate ELA energy of the poly-Si is beneficial for the applications of the driving TFT in organic light-emitting diode (OLED) display in the manufacturing industry.
Incorporation of Resistive Random Access Memory into Low-Temperature Polysilicon Transistor with Fin-Like Structure as 1T1R Device
(1970-01-01)
Huang, Wei-Chen
;
Zheng, Hao-Xuan
;
Chen, Po-Hsun
;
Chang, Ting-Chang
;
Tan, Yung-Fang
In this study, a one transistor one resistor (1T1R) structure combining a fin-like low-temperature polycrystalline-silicon (LTPS) transistor and a resistive random access memory (RRAM) is successfully fabricated. For the fin-like LTPS transistor, both n-type and p-types show excellent electrical output characteristics. Fin-like structure produces more stable output characteristics. Also, the forming and current-voltage (I-V) characteristics are measured in this study, and the RRAM exhibits a forming voltage of about -1.9 V. As for the I-V switching property, the devices are stable and show excellent performance, with the set and reset voltages showing only minimal change over 100 cycles. Moreover, combining the fin-like LTPS transistor and RRAM into a 1T1R structure results in favorable operation over 100 cycles, with excellent retention and endurance. According to these results, RRAM can be successfully combined with a fin-like LTPS transistor for application in current integrated circuit processes without difficulty.
Enhancement of Mechanical Bending Stress Endurance Using an Organic Trench Structure in Foldable Polycrystalline Silicon TFTs
(2020-05-01)
Zheng, Yu-Zhe
;
Huang, Shin-Ping
;
Chen, Po-Hsun
;
Chang, Ting-Chang
;
Tsai, Tsung-Ming
This letter proposes a new organic trench structure which can enhance the endurance of polycrystalline silicon thin film transistors (TFTs) under mechanical bending stress. It compares conventional structure TFTs to devices with an organic trench to examine reliability after undergoing 100,000 iterations of channel width-axis (100,000'WC) compression at R = 2mm. Due to the low Young's modulus of organic materials, stress while undergoing bending strain is desorbed to the buffer layer, which can lower the overall stress in TFTs. Furthermore, an optimal location and ideal length for such an organic trench is evaluated by mechanical bending simulation.
Abnormal C-V Hump Effect Induced by Hot Carriers in Gate Length-Dependent p-Type LTPS TFTs
(2019-11-01)
Huang, Shin-Ping
;
Chen, Po-Hsun
;
Tsao, Yu-Ching
;
Chen, Hong-Chih
;
Zheng, Yu-Zhe
We investigate the abnormal current-voltage (C-V) hump effect of p-type low-temperature polysilicon (LTPS) thin-film transistors (TFTs) which have undergone high current operations. Experimental results indicate localized electron trapping in the gate insulator (GI), which is carried out near the drain. The ON-current ( ${I}_{ \mathrm{\scriptscriptstyle ON}}$ ) enhancement is due to the reduction of effective length, and the OFF-current ( ${I}_{ \mathrm{\scriptscriptstyle OFF}}$ ) decrease as the electron tunneling path distance increases. These can be observed after hot carrier stress in current characteristics. The C-V measurements demonstrate that the threshold voltage ( ${V}_{\text {th}}$ ) shift is associated with the gate length. In addition, capacitance-voltage measurements also show that this localized trapping region remains the same in length, regardless of channel length. Hence, a model is proposed to explain how the electric field, which is gate length-dependent, affects the source side of the device, and then lowers the source barrier height. This leads to bulk leakage, which causes the subthreshold swing degradation at device scale down.
Investigation of the Capacitance-Voltage Electrical Characteristics of Thin-Film Transistors Caused by Hydrogen Diffusion under Negative Bias Stress in a Moist Environment
(2019-10-30)
Chen, Hong-Chih
;
Kuo, Chuan-Wei
;
Chang, Ting-Chang
;
Lai, Wei-Chih
;
Chen, Po-Hsun
In this study, the impact of moisture on the electrical characteristics of an amorphous In-Ga-Zn-O thin-film transistor (a-IGZO TFT) was investigated. In commercial applications of such TFTs, high stability and quality performance in humid environments are essential. During TFT operation under ambient moisture, the electrolysis of water molecules occurs via the tip electric field effect. Hydrogen diffuses from the etch-stop layer or back-channel into the main channel under a negative electric field. The hydrogen atoms act as shallow donors (which causes the carrier concentration in the channel to rise), causing the threshold voltage (V-TH) to shift in the negative direction. Hydrogen diffusion from the overlap of the source/drain and gate electrodes to the channel center caused by the tip electric field induces a significant barrier lowering and V-TH shifts in a short-channel device. However, under negative bias stress (NBS) in ambient moisture, the negative V-TH shift is more obvious in short- than in long-channel devices, indicating suppressed hydrogen diffusion in long-channel devices. This is attributed to the electrolysis of water by the tip electric field at the source, drain, and gate electrodes, which causes hydrogen to diffuse to the center of the channel. Here, a novel physical model of the capacitance-voltage (C-V) electrical property changes under ambient moisture is proposed, based on the early appearance of abnormalities in the C-V measurements. The electrolysis of water caused by the tip electric field and electrical abnormalities caused by hydrogen diffusion into the a-IGZO active layer are explained by this model. A secondary-ion mass spectrometry analysis shows that hydrogen content in the channel generally increases under NBS in ambient moisture. The degradation behavior due to moisture in a-IGZO is clarified. Thus, inhibiting the tip electric field may benefit future flexible-display and gas-sensing applications.
Investigation of the forming process under UV illumination in HfO2-based resistance random access memory with a transparent electrode
(2020-01-09)
Huang, Wei-Chen
;
Huang, Shin-Ping
;
Chen, Po-Hsun
;
Chen, Min-Chen
;
Chang, Ting-Chang
Traditionally, metal is used for the top electrode (TE) in HfO2-based resistance random access memory. When transparent indium-tin-oxide (ITO) is used as the TE, different forming processes, including lower forming voltages and higher forming currents, are exhibited. This work investigates the forming process with such a transparent TE under UV illumination. In addition, different TE thicknesses and device cell sizes are also investigated to confirm the results. Finally, a possible conduction model is provided to explain the mechanisms under UV-light illumination for the transparent TE during the forming process.
Impact of Dehydrogenation Annealing Process Temperature on Reliability of Polycrystalline Silicon Thin Film Transistors
(2019-10-01)
Huang, Shin-Ping
;
Chen, Po-Hsun
;
Chen, Hong-Chih
;
Zheng, Yu-Zhe
;
Chu, Ann-Kuo
This letter investigates variations in polycrystalline silicon thin film transistor (TFT) performance under illumination and negative bias temperature instability (NBTI) tests due to different dehydrogenation annealing temperatures during the fabrication process. The depth of the density of state (DOS) in polysilicon can be indirectly determined by the TFT response to light illumination, since dangling bonds act as recombination centers. The electrical characteristics of TFTs after undergoing NBTI can also be indicative of the bonding type of silicon atoms. By analyzing the results of these reliability tests, the type of DOS can be clarified, which is beneficial for realizing the relationship between performance and reliability.
A Dual-Gate InGaZnO4-Based Thin-Film Transistor for High-Sensitivity UV Detection
(2019-08-01)
Chen, Po-Hsun
;
Tsao, Yu-Ching
;
Chien, Yu-Chieh
;
Chiang, Hsiao-Cheng
;
Chen, Hua-Mao
UV-sensing devices have received significant recent attention for applications in areas such as human health, fire detection, and optical communication. One key factor for product commercialization is determining the optimal materials that allow for integration of excellent UV-sensing properties with compatibility with industrial fabrication processes. However, current UV sensors often fail to achieve this due to either mismatched materials or a device that must be excessively large in order to produce enough photocurrent for UV detection. The UV-light-sensing properties of an amorphous InGaZnO4 (IGZO) thin-film transistor with a dual-gate structure and relatively small device size (width/length = 50 mu m/10 mu m) that achieves high sensitivity through a threshold-voltage-(V-th)-adjustment method is proposed. Comparing the drain currents under UV exposure to those under darkened conditions indicates that the ratio between the photoinduced and dark current reaches 10(6). Furthermore, the UV sensitivity of the dual-gate transistors can be adjusted by varying the bottom gate voltage, with each pixel of the sensor then being read out separately via scan line pulses. This allows the dual-gate a-IGZO transistor to be used for high-performance UV sensing while being effectively integrated in display applications.
Investigating Material Changes at Different Gadolinium Doping Power Levels in Indium-Tin Oxide Intended for Use as an Insulator in Resistive Switching Memory
(2019-06-01)
Lin, Chun-Chu
;
Chen, Po-Hsun
;
Chen, Min-Chen
;
Chang, Ting-Chang
;
Lin, Chih-Yang
This paper investigates material modifications induced by cosputtering indium-tin oxide (ITO) with gadolinium (Gd) at two different power levels. In addition, resistance switching (RS) properties were also verified for use as an insulator in resistive random access memory (RRAM). Comparison of scanning electron microscope (SEM) measurements for the two different cosputtering powers indicated significant changes of the ITO surface. Transparency was also verified by an N&K analyzer measurement, with results indicating a constant in transparency induced by the lower power Gd doping, indicating potential for transparent applications. Furthermore, the mole fraction ratio defined by X-ray photoelectron spectroscopy reveals a Gd2O3 peak, a likely reason for the ITO thin film becoming less conductive. This ITO/Gd:ITO/TiN RRAM can exhibit stable and robust RS characteristics at a lower forming voltage. In addition, lower operating voltages, including both SET and RESET voltages, can be obtained. Reliability tests including endurance and retention were carried out to confirm its RS stability. The RS mechanism of this ITO/Gd:ITO/TiN device was also investigated with the current-voltage (I-V) fitting method. Moreover, temperature effects were also applied to verify the high-resistance state (HRS) mechanism. Finally, a conduction model was proposed to clarify the RS characteristics and confirm that the ITO/Gd:ITO/TiN device is appropriate for data storage.
The Demonstration of Increased Selectivity During Experimental Measurement in Filament-Type Vanadium Oxide-Based Selector
(2018-10-01)
Chen, Chun-Kuei
;
Lin, Chih-Yang
;
Chen, Po-Hsun
;
Chang, Ting-Chang
;
Shih, Chih-Cheng
In this paper, vanadium oxide (VOx) was chosen for the resistive switching layer in a typical resistive random access memory (PRAM) structure. During negative forming bias, we found an initial selector property. This indicates the presence of metal-insulator-transition characteristics in the VOx layer even without an annealing process. In order to study this phenomenon, material analyses were conducted, with results indicating that there are V-O stretching bonds and an oxide/vanadium ratio of nearly 2.2 (O/V. 2.2). In addition, the experimental results of the dc sweeping test indicated that off-state current gradually decreased after each cycle, meaning that the selectivity characteristics in the VOx selector could be improved. Endurance performance of our experimental devices reached 10(8), sufficient for integration with RRAM devices in a 1S1R array. To further investigate this special phenomenon, current fitting analysis and simulation analyses were conducted. The results of the fitting analysis indicated that the conduction mechanism for off-state current was Schottky emission and the Schottky distance increased with increasing numbers of cycles. In other words, oxide ions migrate toward the filament at low negative voltage during dc sweeping, causing the formation of VOx. Furthermore, the results of thermal field simulation analysis indicated that there is a thermal concentration effect in and around the filament. Thus, oxide ions more easily migrate toward the vanadium filament when a stronger electrical field is present around the filament during dc sweeping cycles. Finally, stable vanadium selector characteristics are obtained and a conduction filament behavior model is proposed.

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