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Miniaturized 3-dimensional transformer design
(2005)
Chen, WZ
;
Hsu, KC
;
電子工程學系及電子研究所
;
Department of Electronics Engineering and Institute of Electronics
3-dimentional fully-symmetric transformers are proposed and realized in a standard CMOS technology. In contrast to their planar counterparts, the self resonant frequency (f(SR)) of the proposed architecture is improved by 26 % to 53 %, while the chip area is reduced by 40 % to 70 %. The coupling coefficient (K) can be up to 0.77 at 8 GHz in a two turn two layer architecture. Distributed capacitance model (DCM) of the 3-D transformer is also proposed f(SR) evaulation.