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Chimney-shaped and plateau-shaped gate electrode field emission arrays
(1998-01-01)
Tarntair, FG
;
Wang, CC
;
Hong, WK
;
Huang, HK
;
Cheng, HC
A triode structure of chimney-shaped field emitter arrays is proposed in this article. This triode structure includes the chimney-shaped emitter, thermal oxidation dioxide, and the plateau-shaped singlecrystalline silicon gate electrode. For the application of the matrix-addressable and large area flat panel display, the uniform structure of the emitters and the yield become critical manufacturing issues when attempting to control nano-meter size features. The uniformity and yield of the chimney-shaped emitters are very well controlled. The nano-sized gate-to-emitter separations can be created by the changing thickness of the insulator. The uniformity of the insulator and emitter material can be controlled within 3% which can be obtained by most large area thin film deposition tools, not by photolithography.
Effects of NH3 plasma passivation on N-channel polycrystalline silicon thin-film transistors
(1997-01-01)
Cheng, HC
;
Wang, FS
;
Huang, CY
;
奈米中心
;
Nano Facility Center
The NH3-plasma passivation has been performed on polycrystalline silicon (poly-Si) thin-film transistors (TFT's). It is found that the TFT's after the NH3-plasma passivation achieve better device performance, including the off-current below 0.1 pA/mu m and the on/off current ratio higher than 10(8), and also better hot-carrier reliability than the H-2-plasma ones. Based on optical emission spectroscopy (OES) and secondary ion mass spectroscopy (SIMS) analysis, these improvements were attributed to not only the hydrogen passivation of the defect states, but also the nitrogen pile-up at SiO2/poly-Si interface and the strong Si-N bond formation to terminate the dangling bonds at the grain boundaries of the polysilicon films. Furthermore, the gate-oxide leakage current significantly decreases and the oxide breakdown voltage slightly increases after applying NH3-plasma treatment. This novel process is of potential use for the fabrication of TFT/LCD's and TFT/SRAM's.
Mobility enhancements in AlGaN/GaN/SiC with stair-step and graded heterostructures
(1997-05-12)
Lin, CF
;
Cheng, HC
;
Huang, JA
;
Feng, MS
;
Guo, JD
In this letter, we report the observation of the enhanced electron mobility in three different Al0.08Ga0.92N/GaN heterostructures. These structures were deposited on (0001) 6H-SiC substrates by using the low-pressure metalorganic chemical vapor deposition method. The structure was composed of 500 Angstrom AlGaN compositional stair-step layer deposited onto 1.3 mu m GaN epitaxial layer. There is a 100 Angstrom GaN Cap layer on top of the AlGaN layer to prevent the oxidation of the AlGaN layer. By using the van der Pauw method of Hall measurement, the sheet carrier density and mobility for Al0.08Ga0.92N/GaN heterostructure are 6.6x10(12) cm(-2) and 5413 cm(2)/Vs at 77 K, respectively. This high value of mobility is, to the best of our knowledge, the first observed two-dimensional electron gas (2DEG) at the AlGaN/GaN stair-step type of heterostructure. Other interface structures such as graded composition and bulk composition structures were also prepared and 2DEG properties were observed. (C) 1997 American Institute of Physics.
Reducing threshold voltage shifts in amorphous silicon thin film transistors by hydrogenating the gate nitride prior to amorphous silicon deposition
(1997-09-01)
Tsai, JW
;
Huang, CY
;
Tai, YH
;
Cheng, HC
;
Su, FC
A short H-2 plasma treatment of the gate SiNx before depositing amorphous silicon (a-Si:H) is found to significantly decrease the threshold shifts in the bias stress, inverted a-Si:H thin film transistors (TFTs). The reduced threshold voltage shift is attributed to a plasma induced reconstruction of SiNx precursors leading to the removal of the weak bonds. A prolonged plasma treatment, however, degraded the TFT characteristics; this was traced H-2 plasma damage which eventually generated a rough a-Si:H/SiNx interface. (C) 1997 American Institute of Physics.
Growth and characterizations of GaN on SiC substrates with buffer layers
(1997-09-01)
Lin, CF
;
Cheng, HC
;
Chi, GC
;
Feng, MS
;
Guo, JD
High quality GaN epitaxial layers were grown on 6H-SiC substrates by using low-pressure metalorganic chemical vapor deposition method, Samples employing a three-period GaN/Al0.08Ga0.92N (100 Angstrom/100 Angstrom) as a buffer layer produce a good quality GaN epitaxial layer, with mobility and carrier concentration of 612 cm(2)/V.s and 1.3x10(17) cm(-3) (at 300 K), respectively, The enhanced electron mobility in the Al0.08Ga0.92N/GaN heterostructures is also observed, By using the van der Pauw method of Hall measurement, the sheet carrier density and mobility at 4.2 K for the Al0.08Ga0.92N/GaN heterostructure are 5.8x10(12) cm(-2) and 5300 cm(2)/V.s, respectively. Strong SdH (Shubnikov-de Haas) oscillations were observed to confirm the two-dimensional electron gas (2DEG) phenomenon at the AlGaN/GaN top heterointerface. In addition, an extra SdH oscillation also resulted from the high-duality 2DEG channel of the GaN/AlGaN bottom heterointerface. (C) 1997 American Institute of Physics.
Charging damages to gate oxides in a helicon O-2 plasma
(1997-12-01)
Lin, W
;
Kang, TK
;
Perng, YC
;
Dai, BT
;
Cheng, HC
After the exposure of metal oxide semiconductor (MOS) capacitors with antenna structures to the helicon O-2 plasma, the leakage current. charge-to-breakdown (Q(bd)) and capacitance-voltage (C-V) curves have been characterized to realize the charging damages. The results indicate that the quasi static C-V(QSCV) distortion and Q(bd) depend on the exposure time rather than the antenna ratio. The QSCV and Q(bd) Show a two stage degradation as the exposure time increases. The leakage current increases slightly for the specimens exposed to the plasma for less than 120 s, and increases considerably for the ones with the exposure time of 300 s. Based on these results, the degradation mechanism of gate oxides under the helicon O-2 plasma is established.
The oxidation mechanism of low-pressure dry oxidation of nitrides for memory devices
(1997-09-01)
Liu, HW
;
Su, HP
;
Lai, WK
;
Cheng, HC
;
電子工程學系及電子研究所
To be utilized in the high density dynamic random access memory devices, low-pressure dry oxidation of the very thin nitrides has been performed to successfully obtain the ultrathin capacitors' dielectrics with the effective oxide thickness (t(ox,eff)) of 30 - 60 Angstrom. For the electrical properties, the low-pressure dry oxidized (LPDO) nitrides express thinner effective oxide thickness, lower leakage current, and higher reliability than do the atmospheric pressure dry oxidized (APDO) nitrides. After analyzing the diluted HF etching profiles, Auger electron spectrum and Fourier transform infrared spectrum data, an oxide/nitride/oxide (O/N/O) structure is realized for the LPDO samples with respect to the nitride/oxide structure for the APDO ones. This ultrathin O/N/O structure is believed to be the main cause of improving the electrical characteristics. Finally, a low-pressure enhanced oxidation model is also proposed to explain the unusual oxidation phenomenon on the top of the nitride films. The mechanisms of APDO and atmospheric pressure wet oxidation of nitride films are also compared.
Effects of RCA clean-up procedures on the formation of roughened poly-Si electrodes for high-density DRAMs' capacitors
(1997-11-01)
Liu, HW
;
Lai, WK
;
Yu, SY
;
Huang, SC
;
Cheng, HC
A novel structure, the phosphorus-implanted poly-Si films treated with phosphoric acid (H3PO4) and cleaned by standard RCA cleanup procedures, has been demonstrated as the bottom electrodes of DRAMs' stacked capacitors. After the H3PO4 treatment and RCA cleaning process, micro-island structures are formed on the poly-Si surface of the storage electrodes, The NH4OH + H2O2 + H2O (SC-1) solution in the RCA cleaning procedures is the main component to change the porous surfaces and engraved structures, formed by H3PO4 treatment, into micro-islands. Although the electrical properties are slightly degraded compared to the control samples, but they fulfill the requirements of high-density DRAMs, resulting from the increment of cell capacitance. (C) 1997 Elsevier Science S.A.
The instability characteristics of amorphous silicon thin film transistors with various interfacial and bulk defect states
(1997-10-01)
Cheng, HC
;
Tsai, JW
;
Huang, CY
;
Luo, FC
;
Tuan, HC
The instability characteristics of hydrogenated amorphous silicon (a-Si:H) thin film transistors (TFTs) with various interfacial and bulk defect states were systematically investigated. It was found that, under positive bias stresses; the threshold voltage shifts of a-Si:H TFT's with the same interfacial defect states but with different bulk defect states exhibited similar threshold voltage shift characteristics. In contrast, a-Si:H TFTs with different interfacial defect states but the same bulk defect states showed threshold voltage shifts proportional to the interfacial defect states under positive bias stresses. Furthermore, both the above kinds of a-Si:H TFT under positive bias stresses exhibited that the subthreshold swing shift characteristics closely related to both the interfacial and bulk defect states.
Enhanced metalorganic chemical vapor deposition titanium nitride film fabricated using tetrakis-dimethylamino-titanium for barrier metal application in sub-half-micron technology
(1996-08-01)
Wang, CK
;
Liu, LM
;
Liao, M
;
Cheng, HC
;
Lin, MS
Enhanced metalorganic chemical vapor deposition (MOCVD) titanium nitride (TiN:C) film with low resistivity (< 700 mu Omega . cm) has been fabricated by thermal decomposition of tetrakis-dimethylamino-titanium (TDMAT; Ti[N(CH3)(2)](4)) Enhancement is carried out by in-situ N-2 plasma treatment of as-deposited TiN:C film and the enhanced TiN:C film has good stability: less than 4% increase in film resistivity after exposure to air for 24 days. The amount of oxygen absorbed in this enhanced TiN:C film after air exposure, determined by Auger electron spectroscopy (AES) was significantly reduced. This enhanced MOCVD TiN:C film has been successfully applied to sub-half-micron devices. A void-tree tungsten plug (W plug) for sub-half-micron holes can be achieved. Good barrier performance and low contact/via resistance have also been demonstrated.

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