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Item type:Item, Resist-related damage on ultrathin gate oxide during plasma ashing(1997-02-01) ;Chien, CH ;Chang, CY ;Lin, HC ;Chang, TFChiou, SGThis paper presents an important observation of plasma-induced damage on ultrathin oxides during O-2 plasma ashing by metal ''antenna'' structures with photoresist on top of the electrodes, It is found that for MOS capacitors without overlying photoresist during plasma ashing, only minor damage occurs on thin oxides, even for oxide thickness down to 4.2 nm and an area ratio as large as 10(4), In contrast, oxides thinner than 6 nm with resist overlayer suffer significant degradation from plasma charging, This phenomenon is contrary to most previous reports, It suggests that the presence of photoresist will substantially affect the plasma charging during ashing process, especially for devices with ultrathin gate oxides.Item type:Item, Improvements on electrical characteristics of p-channel metal-oxide-semiconductor field effect transistors with HfO2 gate stacks by post deposition N2O plasma treatment(2005-11-01) ;Lu, WT ;Chien, CH ;Lan, WT ;Lee, TCYang, MJIn this work, we found that employing a post deposition N2O plasma treatment following the deposition of HfO2 film can effectively improve the electrical characteristics of p-type channel metal-oxide-semiconductor field-effect transistors (pMOSFETs) with a HfO2 gate stack in terms of lower gate leakage current, lower interface state density, superior subthreshold swing, higher normalized transconductance and enhanced driving current even though it had led to a slightly higher equivalent oxide thickness (EOT) value of the HfO2 gate stack by around 0.3 nm. In order to clarify the attributes of the improvements, we used charge pumping (CP) measurement to analyze the densities of interface states and bulk traps in the HfO2 gate stacks. The improvements are then ascribed to the higher interface quality offered by the post deposition N2O plasma treatment. Moreover, we found that to more accurately estimate the bulk traps from the CP measurement, the leakage should be taken into account especially at low frequencies. Finally, it was found that the levels of the bulk traps and interface states can be reduced by the N2O plasma treatment, which also helps significantly eliminate the degradation of the gate stack during the subsequent voltage stress.Item type:Item, Reliability of strained SiGe channel p-channel metal-oxide-semiconductor field-effect transistors with ultra-thin (EOT=3.1nm) N2O-annealed SiN gate dielectric(2005-06-01) ;Chen, CW ;Chien, CH ;Chen, YC ;Hsu, SLChang, CYThe p-channel metal-oxide-semi conductor field-effect transistor (pMOSFET) with 50-nm-thick Si0.85Ge0.15 channel and in ultra-thin (EOT = 3.1 nm) N2O-annealed SiN gate dielectric has been shown to have well-performing on/off and output characteristics. Several methodologies for the device reliability characterization, such as stress-induced-leakage-current (SILC), drain-avalanche-hot-carrier (DAHC) injection, channel hot-carrier (CHC) injection and negative-bias-temperature-instability (NBTI), have been used and the results were compared. In terms of the long-term degradation, the excellent quality of the N2O-annealed SiN gate dielectric can be firmly obtained because only negligible degradations have been found after stressing no matter which technique was employed. Even so, the experimental results have been compared and we found that the HC degradation is worse than the NBTI degradation and the channel-hot-carrier (CHC) stressing is the worst case for all kinds of reliability testing. Meanwhile, we have also verified that the interface state generation is the dominant mechanism responsible for the HC-induced degradation while the electron trapping dominates the device degradation for the NBTI stressing.Item type:Item, Characteristics of the inter-poly Al2O3 dielectrics on NH3-nitrided bottom poly-si for next-generation flash memories(2005-04-01) ;Chen, YY ;Chien, CH ;Lou, JC ;電子工程學系及電子研究所Department of Electronics Engineering and Institute of ElectronicsThe effects of surface NH3 nitridation of the bottom poly-Si film, and post-deposition annealing (PDA) temperature, on the electrical properties and reliability characteristics of aluminum oxide (Al2O3) inter-poly capacitors, were evaluated in this study. The polarity-dependent dielectric properties of Al2O3 inter-poly dielectrics (IPDs) were strongly affected by both surface nitridation and the annealing temperature. For positive gate bias, IPDs with NH3 surface nitridation significantly suppressed the formation of an additional layer with a lower dielectric constant, during the post-annealing process, and obtained a smoother interface, compared to those without nitridation treatment. Furthermore, the presence of a thin Si-N layer made the PDA more effective in eliminating the traps existing in the as-deposited films, and improved dielectric characteristics, under negative polarity. As a result, the smoother interface and smaller electron trapping rate contributed to the drastically reduced leakage current, enhanced breakdown field, and charge to breakdown (Q(bd)) of the Al2O3 inter-poly capacitors with surface NH3 nitridation. Moreover, the electrical properties of Al2O3 IPD were heavily dependent upon the PDA temperature. The sample exhibited optimal quality in terms of leakage current, electron trapping rate and Qbd when annealed at 900 degrees C. X-ray photoelectron spectroscopy and Auger electron spectroscopy analyses have shown that this occurrence arises from various compositions, under different annealing conditions and excess oxygen, which can act as an electron trapping center, playing an important role in determining IPD electrical properties.Item type:Item, Electrical characteristics of thin HfO2 gate dielectrics prepared using different pre-deposition surface treatments(2005-01-01) ;Chen, CW ;Chien, CH ;Perng, TH ;Yang, MJLiang, JSWe have investigated the effects that various pre-deposition surface treatments, such as HF dipping (HF-dipped), NH3 surface nitridation (NH3-annealed), and rapid thermal oxidation (RTO-treated), have on the electrical properties of HfO2 gate dielectrics. The NH3-annealed technique is superior to the others because the dielectric subject to NH3 surface nitridation possesses a tremendously reduced leakage current, the lowest equivalent oxide thickness (EOT),and a moderate, hysteresis width. In contrast, the RTO-treated preparation can only effectively reduce the leakage current by its resultant increased physical thickness and displays considerably severe hysteresis. We have also studied the dependence of hysteresis on the initial inversion bias (V-inv), temperature, and frequency for-all splits. The hysteresis width increases upon increasing the initial inversion bias and decreasing the temperature, but it is rather insensitive to the measuring frequency. In addition, our experimental results indicate that the hysteresis width depends exponentially on both the initial inversion bias and the temperature, and it can be described well by a general empirical relationship that has the form C(T) (.) exp(RvVinv,). Finally, the conduction currents through the dielectrics are probably dominated by trap-assisted tunneling (TAT) because the current densities display stronger temperature dependence at low voltage than they do at higher voltages. Based on the trap-assisted tunneling model, the corresponding parameters have been extracted and are presented.Item type:Item, The role of resist for ultrathin gate oxide degradation during O-2 plasma ashing(1997-05-01) ;Chien, CH ;Chang, CY ;Lin, HC ;Chiou, SGHuang, TYDuring ashing process, resist has been intuitively regarded as a protection layer and deliberately removed in previous studies by wet process prior to plasma exposure in an effort to amplify the damage effect, Recently, we found instead that resist does not simply act as a protection layer, This newly observed phenomenon cannot be explained by the well-known electron shading effect which should not affect the area-intensive antenna structure used in our study, In this letter, we hypothesize that this resist-related charging damage is determined by the plasma potential adjustment difference between those devices with and without resist overlayer, The experimental results show a good correlation with our explanation, To be specific, severe antenna area ratio (ARR) dependent degradation of thin gate oxide is induced during the initial ashing stage while the resist is still on the electrodes, not during the overashing period.Item type:Item, Mechanism of nitrogen coimplant for suppressing boron penetration in p(+)-polycrystalline silicon gate of p metal-oxide semiconductor field effect transistor(1996-09-16) ;Chao, TS ;Liaw, MC ;Chu, CH ;Chang, CYChien, CHThe mechanism of the nitrogen co-implant to suppress the boron penetration in p(+)-polycrystalline silicon gate has been investigated. The nitrogen coimplant with the BF, combines with the boron to form a B-N complex which results in a retardation of boron diffusion. It is found that metal-oxide-silicon capacitors with nitrogen implantation show improved electrical properties. (C) 1996 American Institute of Physics.Item type:Item, Characterization of antenna effect by nondestructive gate current measurement(1996-08-15) ;Lin, HC ;Chien, CH ;Huang, TY ;電子工程學系及電子研究所Department of Electronics Engineering and Institute of ElectronicsA novel method is proposed for the effective characterization of plasma-charge-induced damage on thin gate oxides. We have found that the gate current measured at V-g(gate voltage) = V-th(threshold voltage) under a low drain bias (e.g., 0.1 V) is a good indicator of the damage. Since the proposed method requires only low bias voltages, it does not cause additional damage to the devices. The proposed gate current measurement is also easy to incorporate to device measurement routines without an extra stressing step, and thus provides a simple and efficient damage indicator for studying plasma-charge-induced damage.Item type:Item, Off-axial pulse propagation in graded-index materials with Kerr nonlinearity - A variational approach(1996-07-01) ;Chien, CH ;Yu, SS ;Lai, YC ;Wang, JP光電工程研究所We analyze off-axial, self-focused pulse propagation in graded-index Kerr materials with the variational method. Equations which determine the characteristics of the beam, namely the optical path, the wavefront curvature, the beam width, and the pulse duration are derived and solved. We show that continuously adjustable negative group-velocity dispersion can be generated by off-axial propagation, and for pulse energy smaller than a critical value, negative group-velocity dispersion and Kerr nonlinearity warrant the existence of stable spatio-temporal solitary pulses.Item type:Item, Effects of polysilicon gate doping concentration on plasma charging damage in ultrathin gate oxides(2000-02-01) ;Chen, CC ;Lin, HC ;Chang, CY ;Huang, TYChien, CHEffects of poly-gate doping concentration on plasma charging damage in ultrathin gate oxides were investigated. While the charge-to-breakdown (Q(bd)) value under gate injection stress polarity (-V-g) is independent of the doping concentration, eb, under substrate injection stress polarity (+V-g) shows a noticeable improvement with increasing doping concentration. However, our results show that plasma-induced oxide degradation is actually aggravated with increasing poly-gate doping concentration. These seemingly inconsistent observations can be explained by the lowering of plasma charging potential in the case of insufficient poly-gate doping. (C) 1999 The Electrochemical Society. S1099-0062(99)10-079-8. All rights reserved.