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Author: search.filters.author.Guo, Jyh-ChyurnSubject: search.filters.subject.mobility

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Now showing 1 - 4 of 4
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    SiC Strained nMOSFETs With Enhanced High- Frequency Performance and Impact on Flicker Noise and Random Telegraph Noise
    (2020-06-01)
    Guo, Jyh-Chyurn
    ;
    Chang, Chih-Shiang
    ;
    電子工程學系及電子研究所
    ;
    Department of Electronics Engineering and Institute of Electronics
    Silicon-carbon (SiC) strained nMOSFETs with sub35-nm gate length in a 40-nm CMOS technology can realize superior cutoff frequency (f(T)) up to 405 GHz, attributed to more than 20% enhancement of the mobility and transconductance. This super-400-GHz f(T) makes SiC strained nMOS an attractive high mobility device aimed at millimeter-wave (mm-wave) CMOS circuits design. However, the SiC nMOSFETs reveal a dramatic increase in flicker noise and random telegraph noise (RTN), which may cause worse phase noise and detrimental impact on CMOS oscillator stability. The complex RTN features abnormally long capture and emission time constants (tau(c) and tau(e)) and suggests electron-phonon coupling responsible for the anomalously slow trapping and detrapping, due to a significant increase of relaxation energy from SiC strain. This critical tradeoff between high-frequency performance and low-frequency noise becomes a key factor to be considered for the most appropriate adoption of high mobility devices and design optimization adapted to various circuits.
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    Layout-Dependent Stress Effect on High-Frequency Characteristics and Flicker Noise in Multifinger and Donut MOSFETs
    (2011-09-01)
    Yeh, Kuo-Liang
    ;
    Guo, Jyh-Chyurn
    ;
    電子工程學系及電子研究所
    ;
    Department of Electronics Engineering and Institute of Electronics
    The impact of MOSFET layout-dependent stress on high-frequency performance and flicker noise has been investigated. The proposed donut MOSFETs demonstrate the advantages over the standard multifinger MOSFETs, such as the lower flicker noise S(ID)/I(DS)(2) in the low-frequency domain and the higher cutoff frequency f(T) in the very high-frequency region. The elimination of the transverse stress sigma(perpendicular to) from shallow trench isolation (STI) and the suppression of interface traps along the STI edge are proposed as the primary factors responsible for the enhancement of the effective mobility mu(eff), as well as f(T), and the reduction of flicker noise. The significantly lower flicker noise realized by donut devices suggests the reduction of STI-generated traps and the suppression of mobility fluctuation due to eliminated transverse stress. The former is applied to n-channel MOS in which the flicker noise is determined by the number-fluctuation model. The latter is responsible for p-channel MOS whose flicker noise is dominated by the mobility-fluctuation model.
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    Flicker Noise in Nanoscale pMOSFETs with Mobility Enhancement Engineering and Dynamic Body Biases
    (2009)
    Yeh, Kuo-Liang
    ;
    Ku, Chih-You
    ;
    Hong, Wei-Lun
    ;
    Guo, Jyh-Chyurn
    ;
    電子工程學系及電子研究所
    The uni-axial compressive strain from e-SiGe S/D combined with dynamic body biases effect on flicker noise of pMOSFETs is presented in this paper. This compressive strain contributes higher mobility but the worse flicker noise in terms of higher S(ID)/I(D)(2) becomes a potential killer to RF/analog circuits. Forward body biases (FBB) can reduce the flicker noise but the degraded body bias effect in strained pMOSFETs makes it not as efficient as the standard ones without strain. Hooge's mobility fluctuation model is adopted to explain the uni-axial strain and dynamic body biases effect on flicker noise. The increase of Hooge parameter alpha(H) is identified the key factor responsible the degraded flicker noise in strained pMOSFETs.
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    Low Frequency Noise in Nanoscale pMOSFETs with Strain Induced Mobility Enhancement and Dynamic Body Biases
    (2009)
    Yeh, Kuo-Liang
    ;
    Ku, Chih-You
    ;
    Hong, Wei-Lun
    ;
    Guo, Jyh-Chyurn
    ;
    電子工程學系及電子研究所
    Local strain effect on low frequency noise (LFN) of pMOSFETs with gate length down to 60 nm was investigated in this paper. Novel and interesting results were identified from the pMOSFETs adopting embedded SiGe (e-SiGe) in source/drain for uni-axial compressive stress. This local compressive strain can realize significant mobility enhancement and desired current boost in nanoscale pMOSFETs. However, the dramatic increase of LFN emerges as a penalty traded off with mobility enhancement. The escalated LFN may become a critical killer to analog and RF circuits. Forward body biases (FBB) can improve the effective mobility (mu(eff)) and reduce LFN attributed to reduced normal field (E(eff)). However, the benefit from FBB becomes insignificant in strained pMOSFETs with sub-100 nm gate length.