🏛️國立陽明交通大學機構典藏

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Performance Enhancement of Flip-Chip Packaged AlGaN/GaN HEMTs Using Active-Region Bumps-Induced Piezoelectric Effect
(2014-07-01)
Tsai, Szu-Ping
;
Hsu, Heng-Tung
;
Chiang, Che-Yang
;
Tu, Yung-Yi
;
Chang, Chia-Hua
We experimentally investigated the impact of different bump patterns on the output electrical characteristics of flip-chip (FC) bonded AlGaN/GaN high-electron mobility transistors in this letter. The bump patterns were designed and intended to provide different levels of tensile stress due to the mismatch in the coefficient of thermal expansion between the materials. After FC packaging, a maximum increase of 4.3% in saturation current was achieved compared with the bare die when proper arrangement of the bumps in active region was designed. In other words, a 17% improvement has been observed on the optimized bump pattern over the conventional bump pattern. To the best of our knowledge, this is the first letter that investigates the piezoelectric effect induced by FC bumps leading to the enhancement in device characteristics after packaging.
Normally-OFF GaN MIS-HEMT With F- Doped Gate Insulator Using Standard Ion Implantation
(2018-01-01)
Wu, Chia-Hsun
;
Han, Ping-Cheng
;
Quang Ho Luc
;
Hsu, Ching-Yi
;
Hsieh, Ting-En
A normally-OFF GaN metal-insulator-gate high electron mobility transistors with fluorine doped gate insulator has been fabricated using standard ion implantation technique. Fluorine ions with negative charges were doped lightly into both the gate insulator and the partially recessed barrier layer, resulting in high positive threshold voltage (V-th) for the device, meanwhile preserving low ON-resistance. Compared to the fluorine-free and recess-free device, only about 16% increase of ON-resistance was observed for the F- doped devices. The fabricated F- doped device exhibits a threshold voltage of +0.68 V at I-Ds = 5 mu A/mm, a current density of 620 mA/mm, an OFF-state breakdown voltage of 800 V, and high ON/OFF current ratio of 10(10). For thermal stability consideration of fluorine dopant, the V-th-thermal stability test and positive bias temperature instability test were also discussed.
High-Performance Normally-OFF GaN MIS-HEMTs Using Hybrid Ferroelectric Charge Trap Gate Stack (FEG-HEMT) for Power Device Applications
(2018-07-01)
Wu, Chia-Hsun
;
Han, Ping-Cheng
;
Liu, Shih-Chien
;
Hsieh, Ting-En
;
Lumbantoruan, Franky Juanda
A GaN metal-insulator-semiconductor-high electron mobility transistor (HEMT) using hybrid ferroelectric charge trap gate stack (FEG-HEMT) is demonstrated for normally-OFF operation. The ferroelectric (FE) polarization increases the number of trapped charges in the HfON charge trapping layer, leading to high positive threshold voltage (V-th) shift for the normally-OFF device. Besides, under the positive bias temperature instability (PBTI) test, the internal electric field induced by FE polarization causes smoother slope of the conduction band in FE gate stack, resulting in better V-th stability. With the proposed hybrid FE charge trap gate stack, the device exhibits a high V-th of +2.71 V at I-DS = 1 mu A/mm, a high maximum current density of 820 mA/mm and low on-resistance (R-ON) of 11.1 Omega . mm. The FE device also shows good V-th-temperature stability compared to the non-FE device results. Besides, a high current device with 40 A is also fabricated in this letter to demonstrate the feasibility of the proposed FEG-HEMT device for high power device application.
AlGaN/GaN MIS-HEMTs With High Quality ALD-Al2O3 Gate Dielectric Using Water and Remote Oxygen Plasma As Oxidants
(2018-12-01)
Wang, Huan-Chung
;
Hsieh, Ting-En
;
Lin, Yueh-Chin
;
Luc, Quang Ho
;
Liu, Shih-Chien
We demonstrate the electrical performances of AlGaN/GaN metal-insulator-semiconductor-high electron mobility transistors (MIS-HEMTs) with high quality Al2O3 gate dielectric deposited by plasma enhanced atomic layer deposition using both H2O and remote O-2 plasma as oxygen sources. Excellent gate-dielectric/GaN interface and Al2O3 film quality were obtained, resulting in a very small threshold voltage hysteresis and a low interface trap density. The MIS-HEMT device exhibited high on/off current ratio of similar to 10(10), steep subthreshold slope, small gate leakage current, low dynamic on-resistance degradation, and effectively current collapse suppression. These results indicate that incorporating remote O-2 plasma in the ALD-Al2O3 deposition process is an effective and simple way to provide high quality gate dielectric for the GaN MIS-HEMTs production.
Performance Enhancement of Flip-Chip Packaged AlGaN/GaN HEMTs Using Active-Region Bumps-Induced Piezoelectric Effect
(2014-07-01)
Tsai, Szu-Ping
;
Hsu, Heng-Tung
;
Chiang, Che-Yang
;
Tu, Yung-Yi
;
Chang, Chia-Hua
We experimentally investigated the impact of different bump patterns on the output electrical characteristics of flip-chip (FC) bonded AlGaN/GaN high-electron mobility transistors in this letter. The bump patterns were designed and intended to provide different levels of tensile stress due to the mismatch in the coefficient of thermal expansion between the materials. After FC packaging, a maximum increase of 4.3% in saturation current was achieved compared with the bare die when proper arrangement of the bumps in active region was designed. In other words, a 17% improvement has been observed on the optimized bump pattern over the conventional bump pattern. To the best of our knowledge, this is the first letter that investigates the piezoelectric effect induced by FC bumps leading to the enhancement in device characteristics after packaging.

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