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收集所有交通大學研究人員與學生個人或團體所發表之各項學術著作,涵蓋期刊論文、教師專書、學位論文等項。;;Collections of Publications of NCTU Researchers and Students Like Journal Papers and Thesis.

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  • Item type:Item,
    Evidence for a Very Small Tunneling Effective Mass (0.03m(0)) in MOSFET High-k (HfSiON) Gate Dielectrics
    (2012-04-01)
    Chen, Ming-Jer
    ;
    Hsu, Chih-Yu
    ;
    電子工程學系及電子研究所
    ;
    Department of Electronics Engineering and Institute of Electronics
    We have recently conducted experimental and modeling tasks on TaC/HfSiON/SiON n-type MOSFETs, leading to an effective mass of 0.03m(0) for 2-D electrons tunneling in high-k HfSiON dielectrics. In this letter, we present extra evidence obtained from complementary MOSFETs undergoing the same TaC/HfSiON/SiON processing, which shows that such a very small tunneling effective mass is existent not only for 3-D electrons but also for 2-D holes. This new finding is very important because it can substantially enhance the current understanding of gate tunneling leakage suppression in metal-gate high-k MOSFETs.
  • Item type:Item,
    A Method of Extracting Metal-Gate High-k Material Parameters Featuring Electron Gate Tunneling Current Transition
    (2011-04-01)
    Hsu, Chih-Yu
    ;
    Chang, Hua-Gang
    ;
    Chen, Ming-Jer
    ;
    電子工程學系及電子研究所
    ;
    Department of Electronics Engineering and Institute of Electronics
    For metal-gate high-k dielectrics, there is a transition region in the electron gate tunneling current I(g), as characterized by a plot of dlnI(g)/dV(g) versus V(g). In this paper, we systematically construct a new fitting over the region, which can accurately determine material parameters, including metal work function, high-k electron affinity, and tunneling effective masses of electrons. First of all, a calculation of gate current due to electron direct tunneling and/or Fowler-Nordheim tunneling from an inversion layer is performed, yielding the guidelines of the fitting. Experimental samples are presented with n-channel metal-oxide-semiconductor field-effect transistors having low effective oxide thickness (1.4 nm) TaC/HfSiON/SiON gate stacks. Underlying material parameters are extracted accordingly and remain valid for higher temperature and gate voltage. We also demonstrate that a conventional method without a dlnI(g)/dV(g) fitting might lead to erroneous results. Thus, the dlnI(g)/dV(g) fitting is crucial to metal-gate high-k material parameter assessment.