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Effect of Field Plate on the RF Performance of AlGaN/GaN HEMT Devices
(2012-01-01)
Chiang, Che-Yang
;
Hsu, Heng-Tung
;
Chang, Edward Yi
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材料科學與工程學系
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Department of Materials Science and Engineering
This paper examines the effect of the field plate structure on the RF performance of AlGaN/GaN High Electron Mobility Transistor (HEMT) devices. While the field plate structure helps to increase the breakdown voltage of the device through modulating the electric field locally, it induces additional feedback capacitance from drain to gate. Such feedback capacitors may impact the overall RF performance of the device especially at high frequencies. Systematic investigations on the small signal as well as power performance as functions of the drain biases are presented. (C) 2011 Published by Elsevier B.V. Selection and/or peer-review under responsibility of Garry Lee
Monolithic wideband linear power amplifier with 45% power bandwidth using pseudomorphic high-electron-mobility transistors for long-term evolution application
(2014-11-01)
Chiang, Che-Yang
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Hsu, Heng-Tung
;
Chang, Edward Y.
;
材料科學與工程學系
;
Department of Materials Science and Engineering
A fully integrated, monolithic, wideband linear power amplifier using pseudomorphic high-electron-mobility transistor (pHEMT) technology has been developed for long-term evolution (LTE) applications. Implemented through the stacked field-effect transistor (stacked-FET) configuration, the amplifier exhibited a small signal gain of 15 dB and an output power of 25 dBm at 1 dB compression (P-idB) with a power-added efficiency (PAE) of 36% from 1.7 to 2.7 GHz yielding 45% power bandwidth. Moreover, when tested under a 10 MHz LTE-modulated signal, the amplifier achieved a 3% error-vector-magnitude (EVM) at 23 dBm output power over the entire power bandwidth. (C) 2014 The Japan Society of Applied Physics
Improvement on the noise performance of InAs-based HEMTs with gate sinking technology
(2010-11-01)
Hsu, Heng-Tung
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Kuo, Chien-I
;
Chang, Edward Y.
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Kuo, Fang-Yao
;
材料科學與工程學系
Improvement on the RF and noise performance for 80 nm InAs/In(0.7)Ga(0.3)As high-electron mobility transistor (HEMT) through gate sinking technology is presented. After gate sinking at 250 degrees C for 3 min, the device exhibited a high transconductance of 1900 mS/mm at a drain bias of 0.5 V with 1066 mA/mm drain-source saturation current. A current-gain cutoff frequency (f(T)) of 113 GHz and a maximum oscillation frequency (f(max)) of 110 GHz were achieved at extremely low drain bias of 0.1 V. The 0.08 x 40 mu m(2) device with gate sinking demonstrated 0.82 dB minimum noise figure and 14 dB associated gain at 17 GHz with only 1.14 mW DC power consumption. Significant improvement in RF and noise performance was mainly attributed to the reduction of gate-to-channel distance together with the parasitic source resistance through gate sinking technology. (C) 2010 Elsevier B.V. All rights reserved.
InAs-Channel High-Electron-Mobility Transistors for Ultralow-Power Low Noise Amplifier Applications
(2009-04-01)
Chang, Chia-Yuan
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Hsu, Heng-Tung
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Chang, Edward Yi
;
Miyamoto, Yasuyuki
;
材料科學與工程學系
An InAs-channel high-electron-mobility transistor (HEMT) with an 80 nm gate length for ultralow-power low-noise amplifier (LNA) applications has been fabricated and characterized on a 2-in. InP substrate. Small-signal S-parameter measurements performed on the InAs-channel HEMT at a low drain-source voltage of 0.2 V exhibited an excellent f(T) of 120 GHz and an f(max) of 157 GHz. At an extremely low level of dc power consumption of 1.2 mW, the device demonstrated an associated gain of 9.7 dB with a noise figure of less than 0.8 dB at 12 GHz. Such a device also demonstrated a higher associated gain and a lower noise figure than other InGaAs-channel HEMTs at extremely low dc power consumption. These results indicate the outstanding potential of InAs-channel HEMT technology for ultralow-power space-based radar, mobile millimeter-wave communications and handheld imager applications. (c) 2009 The Japan Society of Applied Physics
Improvement in RF performance of 40-nm InAs-channel based HEMTs using Pt gate sinking with two-step recess processes technology
(2010-12-01)
Kuo, Chien-I
;
Hsu, Heng-Tung
;
Wu, Chien-Ying
;
Chang, Edward Y.
;
Chen, Yu-Lin
Forty-nanometer lnAs HEMT devices fabricated by two-step recess and Pt-buried gate were demonstrated for low-noise and low-power millimeter wave applications. The device exhibited a high transconductance of 1650 mS/mm at a drain voltage of 0.5 V. Improvement of the current-gain cutoff frequency from 395 GHz to 423 GHz was achieved with minimum noise figure below 2.5 dB up to 64 GHz at only 4.33 mW DC power consumption level. Besides, the output conductance was decreased from 2400 mS/ mm to 325 mS/mm. These superior performances are attributed to mitigation of the short-channel effect through the proposed technology. (C) 2010 Elsevier B.V. All rights reserved.
Performance Enhancement of Flip-Chip Packaged AlGaN/GaN HEMTs Using Active-Region Bumps-Induced Piezoelectric Effect
(2014-07-01)
Tsai, Szu-Ping
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Hsu, Heng-Tung
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Chiang, Che-Yang
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Tu, Yung-Yi
;
Chang, Chia-Hua
We experimentally investigated the impact of different bump patterns on the output electrical characteristics of flip-chip (FC) bonded AlGaN/GaN high-electron mobility transistors in this letter. The bump patterns were designed and intended to provide different levels of tensile stress due to the mismatch in the coefficient of thermal expansion between the materials. After FC packaging, a maximum increase of 4.3% in saturation current was achieved compared with the bare die when proper arrangement of the bumps in active region was designed. In other words, a 17% improvement has been observed on the optimized bump pattern over the conventional bump pattern. To the best of our knowledge, this is the first letter that investigates the piezoelectric effect induced by FC bumps leading to the enhancement in device characteristics after packaging.
Investigation of the Flip-Chip Package With BCB Underfill for W-Band Applications
(2014-01-01)
Wang, Chin-Te
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Hsu, Li-Han
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Wu, Wei-Cheng
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Hsu, Heng-Tung
;
Chang, Edward Yi
Flip-chip package has great potential for use in millimeter-wave applications. However, the coefficient of thermal expansion mismatch between the chip and the substrate usually generates thermal stresses that fracture the flip-chip structure. The use of underfills with low dielectric loss is essential to improve the mechanical strength and reliability of the flip-chip package. Benzocyclobutene (BCB) was used in this study as the underfill material for the flip-chip structure using the no-flow process. The flip-chip structure with BCB injection provides good RF performance with a return loss of better than 18 dB and an insertion loss of 0.6 dB up to 100 GHz, in addition to a lower dielectric loss. Furthermore, thermal cycle and shear force tests show that the underfill injection can significantly improve the reliability of a flip-chip package.
Assessment of Thermal Impact on Performance of Metamorphic High-Electron-Mobility Transistors on Polymer Substrates Using Flip-Chip-on-Board Technology
(2013-12-01)
Wang, Chin-Te
;
Hsu, Heng-Tung
;
Chiang, Che-Yang
;
Chang, Edward Yi
;
Lim, Wee-Chin
In this study, we have fabricated and characterized an In0.6Ga0.4As metamorphic high-electron-mobility transistor (mHEMT) device packaged using flip-chip-on-board (FCOB) technology. A low-cost polymer substrate was adopted as the carrier for cost-effective purposes. The impact of bonding temperature on the device performance was also experimentally investigated. While the DC performance was not as sensitive, serious degradation in RF performance was observed at high bonding temperature. Such degradation was mainly due to the thermal-mechanical stress resulting from the mismatch in the coefficient of thermal expansion (CTE) between the GaAs chip and the polymer substrate. Quantitative assessment was also performed through equivalent circuit extraction from S-parameter measurements. (C) 2013 The Japan Society of Applied Physics
InAs Thin-Channel High-Electron-Mobility Transistors with Very High Current-Gain Cutoff Frequency for Emerging Submillimeter-Wave Applications
(2013-03-01)
Chang, Edward-Yi
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Kuo, Chien-I
;
Hsu, Heng-Tung
;
Chiang, Che-Yang
;
Miyamoto, Yasuyuki
60 nm InAs high-electron-mobility transistors (HEMTs) with a thin channel, a thin InAlAs barrier layer, and a very high gate stem structure have been fabricated and characterized. The thickness of the channel, as well as that of the InAlAs barrier layer, was reduced to 5 nm. A stem height of 250 nm with a Pt-buried gate was used in the device configuration to reduce the parasitics. A high DC transconductance of 2114 mS/mm and a current-gain cutoff frequency (f(T)) of 710 GHz were achieved at V-DS 0.5V. (C) 2013 The Japan Society of Applied Physics
Performance Evaluation of InGaSb/AlSb P-Channel High-Hole-Mobility Transistor Faricated Using BCl3 Dry Etching
(2013-02-01)
Yu, Chia-Hui
;
Hsu, Heng-Tung
;
Chiang, Che-Yang
;
Kuo, Chien-I
;
Miyamoto, Yasuyuki
In this study, we present the fabrication and characterization of InGaSb/AlSb p-channel high-hole-mobility-transistor devices using inductively coupled plasma (ICP) etching with BCl3 gas. Devices fabricated by the dry etching technique show good DC and RF performances. Radio-frequency (RF) performance for devices with different source-to-drain spacing (L-SD) and gate length (L-g) were investigated. The fabricated 80-nm-gate-length p-channel device with 2-mu m LSD exhibited a maximum drain current of 86.2mA/mm with peak transconductance (g(m)) of 64.5mS/mm. The current gain cutoff frequency (f(T)) was measured to be 15.8 GHz when the device was biased at V-DS = -1.2 V and V-GS = 0.4 V. (C) 2013 The Japan Society of Applied Physics

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