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收集所有交通大學研究人員與學生個人或團體所發表之各項學術著作，涵蓋期刊論文、教師專書、學位論文等項。;;Collections of Publications of NCTU Researchers and Students Like Journal Papers and Thesis.

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Author: search.filters.author.Hsu, KC

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Now showing 1 - 10 of 22
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    A simple dispersion measurement of fiber gratings by interferometric technique
    (2006-01-01)
    Sheu, LG
    ;
    Chen, JM
    ;
    Yu, SY
    ;
    Hsu, KC
    ;
    Tsai, MC
    A simple dispersion measurement of fiber gratings using an un-balanced Michelson interferometer is proposed. A broadband source and an optical spectrum analyzer are used to scan the interference spectrum, and then the group time delay can be obtained rapidly by Fourier transform processing the interference spectrum. We measured the group time delays of a uniform-period FBG, a chirped FBG, an arrayed-waveguide grating interleaver, and a thin-film filter type OADM by an un-balanced Michelson and Mach-Zehnder interferometers, respectively. The experimental results excellent match the measured results of the optical network analyzer. The experimental repeatability is shown to be better than 1ps.
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    Outlook for photovoltaic developments in Taiwan
    (1998-05-01)
    Hwang, HL
    ;
    Hsu, KYJ
    ;
    Lee, WI
    ;
    Shing, YH
    ;
    Hsu, KC
    This paper describes the various aspects of photovoltaic developments ill Taiwan, which include applications of space and terrestrial solar cells, solar cell production and research on advanced thin-film solar cell materials, The advanced materials are hydrogenated polycrystalline silicon films deposited at low substrate temperatures and ternary chalcopyrite films with the potential for intrinsically stable and ultra-high-efficiency solar cells having a conversion efficiency in the vicinity of AMI 35%, (C) 1998 John Wiley & Sons, Ltd.
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    Down-regulation of matrix Gla protein messenger RNA in human colorectal adenocarcinomas
    (2001-04-10)
    Fan, CW
    ;
    Sheu, DL
    ;
    Fan, HA
    ;
    Hsu, KC
    ;
    Chang, CA
    Matrix Gla protein (MGP) is a vitamin K-dependent extracellular matrix protein commonly found in a variety of tissues. In this study, we describe the potential use of MGP gene expression as the tumor marker of colorectal cancer. A decrease in expression of the MGP gene was also discovered in colorectal cancer using differential screening of cDNA libraries. The MGP expression in 80 human colorectal adenocarcinomas was quantified by a Northern blot analysis to better define the expression pattern of MGP in colorectal cancer. The expression of MGP mRNA was reduced in 63 of 80 (79%) colorectal adenocarcinomas (P < 0.001) as compared to the mRNA in adjacent normal tissue, implying that a decrease in MGP expression is associated with colorectal cancer development. The proportion of tumors with downregulated expression of MGP was lower in Duke's A/B than Duke's C/D (34 of 47 versus 26 of 33, respectively) tumors and was lower in moderate differentiation than poor differentiation (44 of 64 versus 16 of 16, respectively). However, chi (2) analysis does not reveal any correlation between a loss of MGP expression and tumor progression or differentiation state. In conclusion, the downregulation of MGP mRNA generally occurs in colorectal adenocarcinomas. Although the role of MGP in cancer development is unknown, the reduced expression of MGP may be used to distinguish the normal colorectal cells from malignant cells. (C) 2001 Elsevier Science Ireland Ltd. All rights reserved.
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    Characterization of porous silicate for ultra-low k dielectric application
    (2002-07-01)
    Liu, PT
    ;
    Chang, TC
    ;
    Hsu, KC
    ;
    Tseng, TY
    ;
    Chen, LM
    Thermal stability of a porous low-k film is a critical issue for application consideration in the back-end-of-line. In this study, thermal stability of the porous silicate has been investigated by changing the thermal processing temperatures. Experimental results have shown that the dielectric constant of the porous silicate still remains below 2.0 after thermal processing at 500 degreesC for I h. A series of material analysis techniques and electrical characteristics have been used to verify the physical and chemical characteristics of the porous silicate film. (C) 2002 Elsevier Science B.V. All rights reserved.
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    Substrate-triggered SCR device for on-chip ESD protection in fully silicided sub-0.25-mu m CMOS process
    (2003-02-01)
    Ker, MD
    ;
    Hsu, KC
    ;
    電子工程學系及電子研究所
    ;
    Department of Electronics Engineering and Institute of Electronics
    The turn-on mechanism of a silicon-controlled rectifier (SCR) device is essentially a current triggering event. While a current is applied to the, base or - substrate of the SCR device, it can be quickly triggered, into its latching state. In this paper, a novel design concept to turn on the SCR device by applying the substrate-triggered technique is first proposed for effective on-chip electrostatic discharge (ESD) protection. This novel substrate-triggered SCR device has the advantages of controllable switching voltage and adjustable holding voltage and is compatible with, general CMOS processes without extra process modification such as the silicide-blocking mask and ESD implantation. Moreover, the substrate-triggered SCR, devices can be stacked in ESD protection circuits to avoid the translient-induced latch-up issue. The turn-on time of the proposed substrate-triggered SCR devices, can be reduced from 27.4 to 7.8 ns by the substrate-triggering, technique. The substrate-triggered SCR device with a small active area of only 20 mum x 20 mum can sustain the HBM ESD stress of 6.5 kV in a fully silicided 0.25-mum CMOS process.
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    Latchup-free ESD protection design with complementary substrate-triggered SCR devices
    (2003-08-01)
    Ker, MD
    ;
    Hsu, KC
    ;
    電子工程學系及電子研究所
    ;
    Department of Electronics Engineering and Institute of Electronics
    The turn-on mechanism of silicon-controlled rectifier (SCR) devices is essentially a current triggering event. While a current is applied to the base or substrate of an SCR device, it can be quickly triggered on into its latching state. In this paper, latchup-free electrostatic discharge (ESD) protection circuits which are combined with the substrate-triggered technique and an SCR device, are proposed. A complementary circuit style with the substrate-triggered SCR device is designed to discharge both the pad-to-V-SS and pad-to-V-DD ESD stresses. The novel complementary substrate-triggered SCR devices have the advantages of controllable switching voltage, adjustable holding voltage, faster turn-on speed, and compatible to general CMOS process without extra process modification such as the silicide-blocking mask and ESD implantation. The total holding voltage of the substrate-triggered SCR device can be linearly increased by adding the stacked diode string to avoid the transient-induced latchup issue in the ESD protection circuits. The on-chip ESD protection circuits designed with the proposed complementary substrate-triggered SCR devices and stacked diode string for the input/output pad and power pad have been successfully verified in a 0.25-mum salicided CMOS process with the human body model (machine model) ESD level of similar to7.25 kV (500 V) in a small layout area.
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    SCR device with double-triggered technique for on-chip ESD protection in sub-quarter-micron silicided CMOS processes
    (2003-09-01)
    Ker, MD
    ;
    Hsu, KC
    ;
    電機學院
    ;
    College of Electrical and Computer Engineering
    Turn-on efficiency is the main concern for silicon-controlled rectifier (SCR) devices used as on-chip electrostatic discharge (ESD) protection circuit, especially in deep sub-quarter-micron CMOS processes with much thinner gate oxide. A novel double-triggered technique is proposed to speed up the turn-on speed of SCR devices for using in on-chip ESD protection circuit to effectively protect the much thinner gate oxide in sub-quarter-micron CMOS processes. From the experimental results, the switching voltage and turn-on time of such double-triggered SCR (DT_SCR) device has been confirmed to be significantly reduced by this double-triggered technique.
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    Dummy-gate structure to improve turn-on speed of silicon-controlled rectifier (SCR) device for effective electrostatic discharge (ESD) protection
    (2003-11-15)
    Ker, MD
    ;
    Hsu, KC
    ;
    電機學院
    ;
    College of Electrical and Computer Engineering
    Turn-on speed is the main concern for on-chip electrostatic discharge (ESD) protection device, especially, in deep submicron complementary metal-oxide semiconductors (CMOS) processes with ultra-thin gate oxide. A novel dummy-gate-blocking silicon-controlled rectifier (SCR) device with substrate-triggered technique is proposed to improve the turn-on speed of SCR device for using in on-chip ESD protection circuit to effectively protect the much thinner gate oxide. From the experimental results, the switching voltage, turn-on resistance, and turn-on time of substrate-triggered SCR (STSCR) device with dummy-gate structure have been efficiently improved, as compared with the normal SCR with shallow trench isolation (STI) structure.
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    A cost-effective fast frequency-hopped code-division multiple-access light source using self-seeded Fabry-Perot laser with fiber Bragg grating array
    (2004-11-01)
    Peng, WR
    ;
    Peng, PC
    ;
    Lin, WP
    ;
    Hsu, KC
    ;
    Lai, YC
    We propose a novel light source for the optical fast frequency-hopped code-division multiple-access scheme using a self-seeded gain-switched Fabry-Perot laser diode (FP-LD) with the reconfigurable fiber Bragg grating array (FBGA). The embedded FBGA in the external cavity loop encodes the input pulses both temporally and spectrally. Before feeding back into the FP-LD, the encoded optical pulses propagate the FBGA with reverse direction and are again temporally combined. With the corporation of the variable fiber delay line, the limitation of the pulse rate by the fixed external cavity length is removed and makes the scheme more flexible. The output with sidemode suppression ratio of more than 20 dB has been obtained. With three fiber Bragg gratings on the FBGA, we demonstrate the encoded chip rate of 1.425 GHz under the driving radio frequency of 475 MHz. It is proved that a different codeword can be generated by simply reconfiguring the encoder without changing the rest of the experimental setup.
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    On-chip ESD protection circuit design with novel substrate-triggered SCR device in sub-quarter-micron CMOS process
    (2002)
    Ker, MD
    ;
    Hsu, KC
    ;
    電子工程學系及電子研究所
    ;
    Department of Electronics Engineering and Institute of Electronics
    A novel design concept to turn on the SCR device by applying the substrate-triggered method is first proposed in the literature for effective on-chip ESD protection design. To avoid the, transient-induced latch-up issue, the substrate-triggered SCR devices are stacked in the ESD protection circuits. The turn-on efficiency of SCR can be greatly improved by applying the substrate-triggered method. The on-chip ESD protection circuits designed with the substrate-triggered SCR devices for input pad, output pad, and power pad have been successfully verified in a 0.25-mum CMOS process. The substrate-triggered SCR device with a smaller layout area of only 40mumx20mum can sustain the HBM ESD stress of higher than 7kV.