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Author: search.filters.author.Hwang, Chih-HongSubject: search.filters.subject.Characteristic fluctuation

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    High-Frequency Characteristic Fluctuations of Nano-MOSFET Circuit Induced by Random Dopants
    (2008-12-01)
    Li, Yiming
    ;
    Hwang, Chih-Hong
    ;
    電信工程研究所
    ;
    Institute of Communications Engineering
    As the dimension of semiconductor device shrunk into nanometer scale (nanoscale), characteristic fluctuation is more pronounced, and become crucial for circuit design. In this paper, discrete-dopant-induced characteristic fluctuation of 16-nm-gate metal-oxide-semiconductor field effect transistors (MOSFET) circuit under high-frequency regime is quantitatively studied. The circuit gain, the 3 dB bandwidth and the unity-gain bandwidth of the tested nanoscale transistor circuit are calculated concurrently capturing the discrete-dopant-number- and discrete-dopant-position-induced fluctuations in the large-scale statistically sound "atomistic" device/circuit coupled simulation. For the 16-nm-gate MOSFET circuit, the number of discrete dopants, varying from zero to 14, may result in 5.7% variation of the circuit gain, 14.1% variation of the 3 dB bandwidth, and 10.4% variation of the unity-gain bandwidth. To suppress the high-frequency characteristic fluctuations, an improved doping distribution along the longitudinal diffusion direction from the MOSFET's surface to substrate is further performed to examine the associated fluctuation. The improved vertical doping profile with less dopants locating near surface of channel effectively reduces the fluctuations of the circuit gain, the 3 dB bandwidth and the unity-gain bandwidth dramatically. Compared with the original doping profile, the reduction is 32.3%, 19.4% and 51.8%, respectively. This study provides an insight into random-dopant-induced intrinsic high-frequency characteristic fluctuations and verifies the potential fluctuation suppression technique on high-frequency characteristic fluctuations of nanoscale transistor circuit.
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    Random-Dopant-Induced Variability in Nano-CMOS Devices and Digital Circuits
    (2009-08-01)
    Li, Yiming
    ;
    Hwang, Chih-Hong
    ;
    Li, Tien-Yeh
    ;
    電信工程研究所
    ;
    Institute of Communications Engineering
    The impact of the number and position of discrete dopants on device characteristics is crucial in determining the transient behavior of nanoscale circuits. An experimentally validated coupled device-circuit simulation was conducted to investigate the discrete-dopant-induced timing-characteristic fluctuations in 16-nm-gate CMOS circuits. The random-doping effect may induce 18.9% gate-capacitance fluctuation, affecting the intrinsic device gate delay and circuit timing. For a 16-nm-gate CMOS inverter, 0.036-, 0.021-, 0.105-, and 0.108-ps fluctuations in rise time, fall time, low-to-high delay time, and high-to-low delay time are found. The timing fluctuations of NAND and NOR circuits are increased, as the number of transistors increased. Because of the same number of transistors in circuits, the timing fluctuation of NAND and NOR are expected to be similar. However, due to the different function and device operation status of circuit, the timing fluctuation is quite different. The function-and circuit-topology-dependent characteristic fluctuations caused by random nature of discrete dopants are found. This paper provides an insight into random-dopant-induced intrinsic timing fluctuations, which can, in turn, be used to optimize nanoscale CMOS field-effect-transistor circuits.