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🏛️國立陽明交通大學機構典藏

Author: search.filters.author.Ko, Chun-LinHas files: No

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    A Low-Cost Broadband Bondwire Interconnect for Heterogeneous System Integration
    (2013)
    Li, Chun-Hsing
    ;
    Ko, Chun-Lin
    ;
    Kuo, Chien-Nan
    ;
    Kuo, Ming-Ching
    ;
    Chang, Da-Chiang
    A low-cost broadband interconnect, composed of bondwires and transmission lines, is proposed for heterogeneous system integration. By designing the length and the characteristic impedance of the transmission lines, the bondwire effect can be reduced to provide an interconnect with good return loss and low insertion loss. In this work, the chip and the carrier are realized in 90-nm CMOS and GIPD process, respectively. Measured results show that the return loss and the insertion loss are better than 10 dB and 1.1 dB, respectively, from DC to 45.2 GHz.
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    A 8-mW 77-GHz Band CMOS LNA by Using Reduced Simultaneous Noise and Impedance Matching Technique
    (2015)
    Ko, Chun-Lin
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    Li, Chun-Hsing
    ;
    Kuo, Chien-Nan
    ;
    Kuo, Ming-Ching
    ;
    Chang, Da-Chiang
    This paper presents analysis and design of source inductance for multistage LNA at 77-GHz band in 90 nm CMOS technology. Instead of simultaneous noise and impedance matching, the analysis shows the optimum degeneration of the single stage design for millimeter-wave frequencies. A low-power 77-GHz band LNA has been demonstrated to verify the optimization result. By using the proposed method, the LNA exhibited a low noise figure of 5.1 dB and a gain of 18.1 dB at 78.5 GHz with only 8 mW from a 1-V power supply.
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    A 37.5-mW 8-dBm-EIRP 15.5 degrees-HPBW 338-GHz Terahertz Transmitter Using SoP Heterogeneous System Integration
    (2015-02-01)
    Li, Chun-Hsing
    ;
    Chao, Tzu-Yuan
    ;
    Lai, Chih-Wei
    ;
    Chen, Wei-Cheng
    ;
    Ko, Chun-Lin
    A low-cost terahertz transmitter is proposed by using system-on-package (SoP) heterogeneous system integration. A signal source in 40-nm CMOS is integrated with an antenna array on a Benzocyclobutene carrier through a broadband low-loss terahertz interconnect. The signal source adopting triple-push oscillator topology is able to produce a differential output without any additional balun circuit. Hence, the power consumption and the chip area can be reduced. The antenna array containing 50 patch antennas is differentially excited to give simulated directivity, efficiency, and antenna gain as high as 22.6 dB, 88%, and 22 dBi, respectively, at 335 GHz. The terahertz interconnect employs a resonator coupling technique to provide low-loss and broadband performance while occupying a small area. Measured results show that the proposed terahertz transmitter can work at 338.4 GHz with equivalent isotropically radiated power (EIRP) of 8.0 dBm while consuming only 37.5 mW from a 1-V supply. The measured half-power beam-width can be as narrow as 15.5 degrees. The EIRP can be further raised to 9.5 dBm as the supply V-DD is increased to 1.3 V. The CMOS chip only occupies an area as small as 0.028 mm(2). All of the design efforts enable the proposed terahertz transmitter to feature in small form factor, low power dissipation, low cost, and high performance. To the best of the authors\' knowledge, this is the most compact, lowest power, lowest cost, and high-performance SoP-based terahertz transmitter reported thus far.
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    On-chip transmission line Modeling and applications to millimeter-wave circuit design in 0.13um CMOS technology
    (2007)
    Ko, Chun-Lin
    ;
    Kuo, Chien-Nan
    ;
    Juang, Ying-Zong
    ;
    交大名義發表
    ;
    National Chiao Tung University
    This paper presents the on-chip transmission line modeling and applications to circuit design at millimeterwave (mm-wave) frequencies. The microstrip model of circuit simulators benefits in fast calculations of the characteristics of microstrip lines. As the structure of on-chip microstrip differs from the modeled structure, two key parameters of the microstrip model need to be modified for the different electromagnetic (EM) behavior according to the measured microstrip line. With proper parameters, the traditional transmission line model is able to accurately predict the real characteristic of on-chip microstrip lines without timeconsuming EM simulation. A mm-wave microstrip line filter and a single-stage cascode low noise amplifier (LNA) are fabricated to verify the model. All passive components for input/output matching networks and bias networks are onchip. The LNA takes the supply voltage and dc current of 1.4 V and 10 mA, respectively. A gain of 3.8dB and an input/output return loss of 8.5/7.OdB are measured at 60.3GHz. The simulation results in both circuits are in good agreement with measured data.