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Novel Metamorphic HEMTs With Highly Doped InGaAs Source/Drain Regions for High Frequency Applications
(2010-10-01)
Sahoo, Kartika Chandra
;
Kuo, Chien-I
;
Li, Yiming
;
Chang, Edward Yi
;
材料科學與工程學系
In this paper, we report the first result of a strained In(0.52)Ga(0.48) As channel high-electron mobility transistor (HEMT) featuring highly doped In(0.4)Ga(0.6) As source/drain (S/D) regions. A lattice mismatch of 0.9% between In(0.52)Ga(0.48) As and In(0.4)Ga(0.6) As S/D has resulted in a lateral strain in the In(0.52)Ga(0.48) As channel region, where the series resistance is reduced with highly doped S/D regions. An experimentally validated device simulation is advanced for the proposed HEMT, and the results of this paper have shown that there are 60% drive-current and 100% transconductance improvements, compared with the conventional structure. A remarkable 150-GHz increase in the cutoff frequency has been seen for the proposed structure over the conventional one as well for the shown devices.
V-Band Flip-Chip Assembled Gain Block Using In0.6Ga0.4As Metamorphic High-Electron-Mobility Transistor Technology
(2011-10-01)
Chiang, Che-Yang
;
Hsu, Heng-Tung
;
Wang, Chin-Te
;
Kuo, Chien-I
;
Hsu, Heng-Shou
This study fabricated a 150 nm In0.6Ga0.4As metamorphic high-electron-mobility transistor (mHEMT) device with flip-chip packaging. The packaged device exhibited favorable DC characteristics with I-DS = 350 mA/mm and a transconductance of 600 mS/mm at V-DS = 0.5V. A maximum available gain (MAG) of 6.5 dB at 60 GHz was achieved with 10 mW DC power consumption. A two-stage gain block was designed and fabricated. The gain block exhibited a small signal gain of 9 dB at 60 GHz with only 20 mW DC power consumption. Such superior performance is comparable to the mainstream submicron complimentary metal-oxide-semiconductor (CMOS) technology with lower power consumption. (C) 2011 The Japan Society of Applied Physics
RF Performance Improvement of Metamorphic High-Electron Mobility Transistor Using (InxGa1-xAs)(m)/(InAs)(n) Superlattice-Channel Structure for Millimeter-Wave Applications
(2010-07-01)
Kuo, Chien-I
;
Hsu, Heng-Tung
;
Chen, Yu-Lin
;
Wu, Chien-Ying
;
Chang, Edward Yi
High-performance metamorphic high-electron mobility transistors (MHEMTs) using an (InxGa1-xAs)(m)/(InAs)(n) superlattice structure as a channel layer have been fabricated successfully. These HEMTs with 80-nm gate length exhibited a high drain current density of 392 mA/mm and a transconductance of 991 mS/mm at 1.2-V drain bias. Compared with a regular InxGa1-xAs channel, the superlattice-channel HEMTs showed an outstanding performance due to the high electron mobility and better carrier confinement in the (InxGa1-xAs)(m)/(InAs)(n) channel layer. When biased at 1.2 V, the current gain cutoff frequency (f(T)) and the maximum oscillation frequency (f(max)) were extracted to be 304 and 162 GHz, respectively. As for noise performance, the device demonstrated a 0.75-dB minimum noise figure(NFmin) with an associated gain of 9.6 dB at 16 GHz. Such superior performance has made the devices with a superlattice channel well suitable for millimeter-wave applications.
Quantum Well InAs/AlSb/GaSb Vertical Tunnel FET With HSQ Mechanical Support
(2015-05-01)
Zeng, Yuping
;
Kuo, Chien-I
;
Hsu, Chingyi
;
Najmzadeh, Mohammad
;
Sachid, Angada
A type-III (broken gap) band alignment heterojunction vertical in-line InAs/AlSb/GaSb tunnel FET, including a 2-nm-thin AlSb tunneling barrier is demonstrated. The impact of overlap and underlap gate is studied experimentally and supported further by quasi-stationary 2-D TCAD Sentaurus device simulations. Hydrogen silsesquioxane is used as a novel mechanical support structure to suspend the 10-nm-thin InAs drain with enough undercut to be able to demonstrate an overlap gate architecture. The overlap gate InAs/AlSb/GaSb TFET shows an ON current density of 22 mu A/mu m(2) at V-GS = V-DS = 0.4 V and the subthreshold slope is 194 mV/decade at room temperature and 46 mV/decade at 100 K.
Method for forming gate pattern for electronic device
(2007-03-22)
Chen, Szu-Hung
;
Kuo, Chien-I
;
Chang, Edward Yi
A method for forming a gate pattern for an electronic device, comprising steps of: providing a substrate, whereon a first photo-resist layer is formed; performing a first photo-lithography process so as to form a first pattern with a first width on the substrate; forming a second photo-resist layer, covering the first pattern and the first photo-resist layer on the substrate; and performing a second photo-lithography process, which is shifted from the first photo-lithography process, so as to form a second pattern with a second width on the substrate; wherein the second width is smaller than the first width.
Novel Metamorphic HEMTs With Highly Doped InGaAs Source/Drain Regions for High Frequency Applications
(2010-10-01)
Sahoo, Kartika Chandra
;
Kuo, Chien-I
;
Li, Yiming
;
Chang, Edward Yi
;
傳播研究所
In this paper, we report the first result of a strained In(0.52)Ga(0.48) As channel high-electron mobility transistor (HEMT) featuring highly doped In(0.4)Ga(0.6) As source/drain (S/D) regions. A lattice mismatch of 0.9% between In(0.52)Ga(0.48) As and In(0.4)Ga(0.6) As S/D has resulted in a lateral strain in the In(0.52)Ga(0.48) As channel region, where the series resistance is reduced with highly doped S/D regions. An experimentally validated device simulation is advanced for the proposed HEMT, and the results of this paper have shown that there are 60% drive-current and 100% transconductance improvements, compared with the conventional structure. A remarkable 150-GHz increase in the cutoff frequency has been seen for the proposed structure over the conventional one as well for the shown devices.
Improvement on the noise performance of InAs-based HEMTs with gate sinking technology
(2010-11-01)
Hsu, Heng-Tung
;
Kuo, Chien-I
;
Chang, Edward Y.
;
Kuo, Fang-Yao
;
材料科學與工程學系
Improvement on the RF and noise performance for 80 nm InAs/In(0.7)Ga(0.3)As high-electron mobility transistor (HEMT) through gate sinking technology is presented. After gate sinking at 250 degrees C for 3 min, the device exhibited a high transconductance of 1900 mS/mm at a drain bias of 0.5 V with 1066 mA/mm drain-source saturation current. A current-gain cutoff frequency (f(T)) of 113 GHz and a maximum oscillation frequency (f(max)) of 110 GHz were achieved at extremely low drain bias of 0.1 V. The 0.08 x 40 mu m(2) device with gate sinking demonstrated 0.82 dB minimum noise figure and 14 dB associated gain at 17 GHz with only 1.14 mW DC power consumption. Significant improvement in RF and noise performance was mainly attributed to the reduction of gate-to-channel distance together with the parasitic source resistance through gate sinking technology. (C) 2010 Elsevier B.V. All rights reserved.
Improvement in RF performance of 40-nm InAs-channel based HEMTs using Pt gate sinking with two-step recess processes technology
(2010-12-01)
Kuo, Chien-I
;
Hsu, Heng-Tung
;
Wu, Chien-Ying
;
Chang, Edward Y.
;
Chen, Yu-Lin
Forty-nanometer lnAs HEMT devices fabricated by two-step recess and Pt-buried gate were demonstrated for low-noise and low-power millimeter wave applications. The device exhibited a high transconductance of 1650 mS/mm at a drain voltage of 0.5 V. Improvement of the current-gain cutoff frequency from 395 GHz to 423 GHz was achieved with minimum noise figure below 2.5 dB up to 64 GHz at only 4.33 mW DC power consumption level. Besides, the output conductance was decreased from 2400 mS/ mm to 325 mS/mm. These superior performances are attributed to mitigation of the short-channel effect through the proposed technology. (C) 2010 Elsevier B.V. All rights reserved.
An 80 nm In(0.7)Ga(0.3)As MHEMT with Flip-Chip Packaging for W-Band Low Noise Applications
(2010-01-01)
Wang, Chin-Te
;
Kuo, Chien-I
;
Lim, Wee-Chin
;
Hsu, Li-Han
;
Hsu, Heng-Tung
The fabrication process of an 80 nm In(0.7)Ga(0.3)As MHEMT device with flip-chip packaging on Al(2)O(3) substrate is presented. The flip-chip packaged device exhibited good dc characteristics with high I(DS) = 425 mA/mm and high g(m) = 970 mS/mm at V(DS) = 1.5 V. Besides, the RF performances revealed high gain of 10 dB at 50 GHz and low minimum noise figure (NF(min))below 2 dB at 60 GHz, showing the feasibility of flip-chip packaged In(0.7)Ga(0.3)As MHEMT device for low noise applications at W-band.
Investigation of Characteristics of Al2O3/n-In (x) Ga1-x As (x=0.53, 0.7, and 1) Metal-Oxide-Semiconductor Structures
(2013-08-01)
Trinh, Hai-Dang
;
Lin, Yueh-Chin
;
Kuo, Chien-I
;
Chang, Edward Yi
;
Hong-Quan Nguyen
The electrical properties of Al2O3/n-InGaAs metal-oxide-semiconductor capacitors (MOSCAPs) with In content of 0.53, 0.7, and 1 (InAs) have been investigated. Results show small capacitance-voltage (C-V) frequency dispersion in accumulation (1.70% to 1.85% per decade) for these MOSCAPs, mostly being assigned to border traps in Al2O3. With higher In content, shorter minority-carrier response time and smaller C-V hysteresis are observed. The reduction of C-V hysteresis might be related to the reduction of Ga-bearing oxides in Al2O3/InGaAs interfaces as indicated by x-ray photoelectron spectroscopy.

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