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🏛️國立陽明交通大學機構典藏

Author: search.filters.author.Lai, YL

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Now showing 1 - 10 of 18
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    2-V-operation delta-doped power HEMT's for personal handy-phone systems
    (1997-08-01)
    Lai, YL
    ;
    Chang, EY
    ;
    Chang, CY
    ;
    Liu, TH
    ;
    Wang, SP
    A high-efficiency and high-power-density delta-doped AIGaAs/InGaAs HEMT with low adjacent channel leakage has been developed for the digital wireless personal handy-phone system (PHS). When qualified by 1.9-GHz pi/4-shifted quadrature phase shift keying (QPSK) modulated PHS standard signals, the 2.0-V-operation HEMT with a 1-mm gate width demonstrated a power-added efficiency of 45.3% and an output power density of 105 mW/mm. This is the highest power density ever reported by the power transistors for the PHS. The state-of-the-art results for the PHS operating at 2.0 V were achieved by the delta-doped power HEMT for the first time.
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    5 mm high-power-density dual-delta-doped power HEMT's for 3 V L-band applications
    (1996-05-01)
    Lai, YL
    ;
    Chang, EY
    ;
    Chang, CY
    ;
    Chen, TK
    ;
    Liu, TH
    A high-power-density dual-delta-doped AlGaAs/InGaAs/GaAs high electron mobility transistor (HEMT) for personal communication applications has been developed. A 5.0 mm gate-width device operating at a drain bias of 3.0 V gave an output power over 1 W, The 1 mu m gate-length HEMT exhibited a current density of 425 mA/mm at V-gs = 0.5 V, The maximum transconductance of the device was 270 mS/mm, The effective knee voltage was as low as 0.3 V, At the class AB operation, the HEMT demonstrated an output power density of 200 mW/mm, 64% power-added efficiency and 18.2 dB linear gain at 900 MHz, This is the highest power density of a dual-delta-doped AlGaAs/InGaAs/GaAs HEMT reported to date for low voltage (3 V) wireless applications.
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    A novel fabrication technique of T-shaped gates using an EGMEA and PMIPK multilayer resist system and a single-step electron-beam exposure
    (1998-03-01)
    Lai, YL
    ;
    Lai, YK
    ;
    Chang, CY
    ;
    Chang, EY
    ;
    材料科學與工程學系
    A novel fabrication process of submicron T-shaped gates using an EGMEA and PMIPK multi-layer resist system and e-beam lithography has been developed. Due to the different sensitivities of the EGMEA and PMIPK resists, narrow/wide/narrow resist opening was obtained. The status of the electron scattering and the incident primary electron beams statistically construct the absorbed energy density distribution contours. The absorbed energy density distribution contours in association with the sensitivity feature of the resists and the appropriate development conditions determine the final resist profile. Only a single exposure step and a single development step are required. The simplified fabrication process of T-shaped gates significantly reduces not only the process time but also the production costs. The simple submicron T-shaped gate fabrication process studied provides a suitable technique for the mass manufacture of the advanced InP-based and GaAs-based microwave devices and circuits.
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    A GaAs/AlAs wet selective etch process for the gate recess of GaAs power metal-semiconductor field-effect transistors
    (2001-01-01)
    Chang, EY
    ;
    Lai, YL
    ;
    Lee, YS
    ;
    Chen, SH
    ;
    材料科學與工程學系
    A highly selective wet chemical etch process for gate recess of the GaAs power metal-semiconductor field effect transistors (MES FETs) was developed. The power MESFETs used in this study were epitaxially grown devices with a 20 Angstrom A1As etch-stop layer for gate recess. The selective etch process using citric acid/potassium citrate/hydrogen peroxide solution was studied. A selectivity better than 3800:1 was achieved for GaAs/A1As layers. This selective etch was applied both to high-power, high-voltage power MESFETs and low-voltage large-periphery power MESFETs. For high-power applications, the 14.7 mm device had a breakdown voltage of 22 V. When tested at 1.88 GHz with a drain bias of 10 V, it provided a maximum output power of 38.8 dBm and a maximum power-added efficiency of 52.5%. For low-voltage applications, the 19.8 mm device was tested under IS-95 code-division multiple access (CDMA) modulation at 1.88 GHz with a drain bias of 3.5 V. Under CDMA modulation, the device showed an output power of 28.03 dBm with an adjacent channel power rejection of -29.6 dBc at 1.25 MHz offset frequency. Both devices also showed excellent uniformity in pinch-off voltages. (C) 2000 The Electrochemical Society. S0013-4651 (00)03-053-6. All rights reserved.
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    Novel I-line phase shift mask technique for submicron T-shaped gate formation
    (2002-07-01)
    Chen, SH
    ;
    Chang, HC
    ;
    Fu, DK
    ;
    Chang, EY
    ;
    Lai, YL
    A novel submicron (<0.2 mum) T-shaped gate technology using a phase shift mask (PSM) technique is developed. The 8% half-tone PSM was selected for the definition of the isolated narrow space. Before lithography, a 2000 Angstrom SiN film was deposited on the wafer. After i-line PSM exposure and reactive ion etching (RIE) of the silicon nitride film, openings less than 0.2 mum wide were formed on the SiN film. To further reduce the dimensions of the openings, an additional 566 Angstrom nitride was then deposited on the wafer and etched back using RIE without any mask. An opening of 0.167 mum was formed on the wafer after the dry etching process. The wafer was then coated with another layer of photoresist to form a lift-off structure. The T-shaped gate with a length of 0.167 mum was obtained using this technique. The novel T-shaped gate technology is a high-throughput process for both silicon and compound semiconductor devices.
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    High-performance pseudomorphic power HEMTs for low-voltage wireless communication applications
    (1996)
    Lai, YL
    ;
    Chan, EY
    ;
    Chang, CY
    ;
    Liu, TH
    ;
    Wang, SP
    A high-performance pseudomorphic high electron mobility transistor (HEMT) with high output power density and high power-added efficiency for low-voltage wireless communication applications has been developed. This paper describes the de and microwave performance of the pseudomorphic AlGaAs/InGaAs HEMT developed. The 1 um gate-length HEMT exhibited a maximum drain current of 470 mA/mm at V-gs = +1.0 V. The maximum transconductance of the device was 280 mS/mm. At a drain bias of 3.0 V and a measurement frequency of 900 MHz, the 2mm-wide HEMT demonstrated an output power of 26.1 dBm ( a power density of 204 mW/mm) and a power-added efficiency of 65 % under the class AB condition while an output power of 26.7 dBm (234 mW/mm) and a power-added efficiency of 60 % were obtained under the class A condition. The developed pseudomorphic power HEMT developed achieves the highest output power density ever reported among the GaAs devices operating at 3.0 V.
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    Highly selective etch process for the manufacture of GaAs power MESFET's
    (1999)
    Chang, EY
    ;
    Lai, YL
    ;
    Lee, YS
    ;
    材料科學與工程學系
    ;
    Department of Materials Science and Engineering
    In this paper, a highly selective etch process for the manufacture of GaAs power metal-semiconductor field-effect transistor (MESFET's) has been developed. The selective etch process using citric acid/potassium citrate/hydrogen peroxide solutions were studied. The experimental results were utilized to the gate recess process of the GaAs MESFET's for advanced wireless communication applications. When operating at a drain bias of 10 V and a frequency of 1.88 GHz, the 14.7-mm-wide MESFET's provided a maximum output power (Pout) of 38.8 dBm with a power-added efficiency (PAE) of 49.5% and a gain of 8.42 dB. The linear gain was 12.2 dB and the Pout at l-dB compression was 37.7 dBm with a PAE of 50.7%. The maximum PAE was 52.5%.
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    Robust ultrathin oxynitride with high nitrogen diffusion barrier near its surface formed by NH3 nitridation of chemical oxide and reoxidation with O-2
    (2006-06-01)
    Lai, CH
    ;
    Lin, BC
    ;
    Chang, KM
    ;
    Hsieh, KY
    ;
    Lai, YL
    We have proposed an approach for growing robust ultrathin oxynitride using conventional thermal processes with the capability of preventing boron penetration. In this method, we obtain oxynitride with high nitrogen concentration (approximate to 13 at. %) on the top and low interface state density (D-it = 2 x 10(10) cm(-2) eV(-1)). The films demonstrate excellent properties in terms of low Dit, low leakage current, high endurance in stressing and superior boron diffusion blocking behavior. This method does not involve any additional capital equipment [such as decoupled plasma nitridation (DPN) or remote plasma nitridation (RPN)] or gas (NO or N2O). In addition, it obtains high-quality oxynitride film with low thermal budget. Most importantly, this process is simple and fully compatible with current process technology. It would be important and interesting for process engineers engaged in the field of gate dielectrics. It is suitable for the next generation of ULSI technology.
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    High-performance An/Ti/Ge/Pd ohmic contacts on n-Type In0.5Ga0.5P
    (1996-04-01)
    Chai, CY
    ;
    Wu, JW
    ;
    Guo, JD
    ;
    Huang, JA
    ;
    Lai, YL
    High-performance Au/Ti/Ge/Pd ohmic contacts on n(+)-In0.5Ga0.5P have been fabricated for the first time. Using an n(+)-In0.5Ga0.5P epitaxial layer grown by low pressure metalorganic chemical vapor deposition (LP-MOCVD) with a Si dopant concentration of about 2 x 10(18) cm(-3), the minimum specific contact resistivity is as low as 1.2 x 10(-5) Ohm . cm(2), which is much lower than that of AuGeNi contacts after rapid thermal annealing at 400 degrees C for 60 s. The thermal stability of the Au/Ti/Ge/Pd system is significantly higher than that of conventional AuGeNi due to the introduction of the Ti barrier layer. Many holes and islands are observed on the surfaces of samples annealed at high temperature. The outdiffusion of P from the decomposed In0.5Ga0.5P substrate and agglomeration of Pd and Ge are the primary causes of contact degradation.
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    Excellent Au/Ge/Pd ohmic contacts to n-type GaAs using Mo/Ti as the diffusion barrier
    (1996-04-01)
    Chai, CY
    ;
    Huang, JA
    ;
    Lai, YL
    ;
    Wu, JW
    ;
    Chang, CY
    Au/Ge/Pd metallization system using Mo/Ti as the diffusion barrier between the Au overlayer and the Ge/Pd underlayer has been performed for the first time to achieve excellent ohmic contacts to n(+)-GaAs with the Si-doping concentration of about 2 x 10(18) cm(-3). The minimum specific contact resistivity as low as 1.2 x 10(-7) Ohm . cm(2) can be obtained after the rapid thermal annealing at 325 degrees C for 60 s, which is much lower than those of the conventional Au/Ge/Pd metallization systems. Furthermore, the available annealing temperature range for such low specific contact resistivities is also significantly extended from 325 degrees C to 400 degrees C. The improvement is attributed to the effective retardation of As-outdiffusion by the Mo/Ti barrier.