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收集所有交通大學研究人員與學生個人或團體所發表之各項學術著作，涵蓋期刊論文、教師專書、學位論文等項。;;Collections of Publications of NCTU Researchers and Students Like Journal Papers and Thesis.

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Author: search.filters.author.Liu, Heng-JuiSubject: search.filters.subject.2D electronics

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    Low-Voltage Operational, Low-Power Consuming, and High Sensitive Tactile Switch Based on 2D Layered InSe Tribotronics
    (2019-05-09)
    Li, Mengjiao
    ;
    Yang, Feng-Shou
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    Hsiao, Yung-Chi
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    Lin, Che-Yi
    ;
    Wu, Hsing-Mei
    Electronics based on layered indium selenide (InSe) channels exhibit promising carrier mobility and switching characteristics. Here, an InSe tribotronic transistor (denoted as w/In InSe T-FET) obtained through the vertical combination of an In-doped InSe transistor and triboelectric nanogenerator is demonstrated. The w/In InSe T-FET can be operated by adjusting the distance between two triboelectrification layers, which generates a negative electrostatic potential that serves as a gate voltage to tune the charge carrier transport behavior of the InSe channel. Benefiting from the surface charging doping of the In layer, the w/In InSe T-FET exhibits high reliability and sensitivity with a large on/off current modulation of 10(6) under a low drain-source voltage of 0.1 V and external frictional force. To demonstrate its function as a power-saving tactile sensor, the w/In InSe T-FET is used to sense INSE in Morse code and power on a light-emitting diode. This work reveals the promise of 2D material-based tribotronics for use in nanosensors with low power consumption as well as in intelligent systems.
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    High Mobilities in Layered InSe Transistors with Indium-Encapsulation-Induced Surface Charge Doping
    (2018-11-02)
    Li, Mengjiao
    ;
    Lin, Che-Yi
    ;
    Yang, Shih-Hsien
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    Chang, Yuan-Ming
    ;
    Chang, Jen-Kuei
    Tunability and stability in the electrical properties of 2D semiconductors pave the way for their practical applications in logic devices. A robust layered indium selenide (InSe) field-effect transistor (FET) with superior controlled stability is demonstrated by depositing an indium (In) doping layer. The optimized InSe FETs deliver an unprecedented high electron mobility up to 3700 cm(2) V-1 s(-1) at room temperature, which can be retained with 60% after 1 month. Further insight into the evolution of the position of the Fermi level and the microscopic device structure with different In thicknesses demonstrates an enhanced electron-doping behavior at the In/InSe interface. Furthermore, the contact resistance is also improved through the In insertion between InSe and Au electrodes, which coincides with the analysis of the low-frequency noise. The carrier fluctuation is attributed to the dominance of the phonon scattering events, which agrees with the observation of the temperature-dependent mobility. Finally, the flexible functionalities of the logic-circuit applications, for instance, inverter and not-and (NAND)/not-or (NOR) gates, are determined with these surface-doping InSe FETs, which establish a paradigm for 2D-based materials to overcome the bottleneck in the development of electronic devices.