<link rel="stylesheet" href="styles.cf390c6bfbe7555f.css">

學術出版;;Publications

Permanent URI for this communityhdl:11536/1

收集所有交通大學研究人員與學生個人或團體所發表之各項學術著作，涵蓋期刊論文、教師專書、學位論文等項。;;Collections of Publications of NCTU Researchers and Students Like Journal Papers and Thesis.

Browse

🏛️國立陽明交通大學機構典藏

Author: search.filters.author.Liu, Po-TsunSubject: search.filters.subject.nonvolatile memory

Search Results

Now showing 1 - 5 of 5
  • Thumbnail Image
    Item type:Item,
    A novel nanowire channel poly-Si TFT functioning as transistor and nonvolatile SONOS memory
    (2007-09-01)
    Chen, Shih-Ching
    ;
    Chang, Ting-Chang
    ;
    Liu, Po-Tsun
    ;
    Wu, Yung-Chun
    ;
    Lin, Po-Shun
    In this letter, a polycrystalline silicon thin-film transistor consisting of silicon-oxide-nitride-oxide-silicon (SONOS) stack gate dielectric and nanowire (NW) channels was investigated for the applications of transistor and nonvolatile memory. The proposed device, which is named as NW SONOS-TFT, has superior electrical characteristics of transistor, including a higher drain current, a smaller threshold voltage (V-th), and a steeper subthreshold slope. Moreover, the NW SONOS-TFT also can exhibit high program/erase efficiency under adequate bias operation. The duality of both transistor and memory device for the NW SONOS-TFT can be attributed to the trigate structure and channel corner effect.
  • Thumbnail Image
    Item type:Item,
    Nickel silicide nanocrystals embedded in SiO2 and HfO2 for nonvolatile memory application
    (2007-12-03)
    Yang, F. M.
    ;
    Chang, T. C.
    ;
    Liu, Po-Tsun
    ;
    Yeh, Y. H.
    ;
    Yu, Y. C.
    In this study, a nonvolatile memory device with NiSi2 nanocrystals embedded in the SiO2 and HfO2 layer has been fabricated. A significant memory effect is observed during the characterization of the electrical properties. When a low operating voltage, 4 V, is applied, a significant threshold voltage shift of 1.3 V, is observed. The processing of this structure is compatible with the current manufacturing technology of semiconductor industry. (C) 2007 Published by Elsevier B.V.
  • Thumbnail Image
    Item type:Item,
    Formation of germanium nanocrystals by rapid thermal oxidizing SiGeO layer for nonvolatile memory application
    (2007-12-15)
    Chen, Wei-Ren
    ;
    Chang, Ting-Chang
    ;
    Liu, Po-Tsun
    ;
    Tu, Chun-Hao
    ;
    Yeh, Jui-Lung
    A new method to fabricate Ge nanocrystals by rapid thermal oxidizing SiGeO layer for nonvolatile memory application was investigated in this study. The oxidation process nucleated the Ge nanocrystals embedded in the dielectric layer was clearly observed by transmission electron microscope analysis. Moreover, an over-oxidation phenomenon for the formation of GeO2 in this work was found at higher temperature oxidation according to the X-ray photoelectron spectroscopy analysis. The obvious memory window was found in the capacitance-voltage hysteresis curve, and the program efficiency of holes was superior to electrons due to the electronic affinity of GeO2 smaller than silicon substrate for a structure of Ge nanocrystals surrounded with GeO2 layer. Furthermore, the Ge nanocrystals surrounded with GeO2 layer structure has good retention time and endurance. (c) 2007 Elsevier B.V All rights reserved.
  • Thumbnail Image
    Item type:Item,
    Fort-nation of stacked nickel-silicide nanocrystals by using a co-mixed target for nonvolatile memory application
    (2007-12-15)
    Chen, Wei-Ren
    ;
    Chang, Ting-Chang
    ;
    Liu, Po-Tsun
    ;
    Tu, Chun-Hao
    ;
    Chi, Feng-Weng
    The formation of stacked nickel-silicide nanocrystals by using a co-mixed target is proposed in this paper. High resolution transmission electron microscope analysis clearly shows the stacked nanocrystals embedded in the silicon oxide after rapid thermal oxidation. The obvious memory window can be used to define "1" and "0" states at low voltage operation. In addition, the program/erase characteristics have different charge/discharge efficiency due to the effect of stacked structure. Furthermore, good endurance and retention characteristics are exhibited for nonvolatile memory application. Besides, this technology is suitable for the fabrication of current nonvolatile memory and application of low power device. (C) 2007 Elsevier B.V. All rights reserved.
  • Thumbnail Image
    Item type:Item,
    Characteristics of poly-Si TFT combined with nonvolatile SONOS memory and nanowire channels structure
    (2007-12-15)
    Chen, Shih-Ching
    ;
    Chang, Ting-Chang
    ;
    Liu, Po-Tsun
    ;
    Wu, Yung-Chun
    ;
    Lin, Po-Shun
    In this work, we study a polycrystalline silicon thin-film transistor (poly-Si TFT) combined with a silicon-oxide-nitride-oxide-silicon (SONOS) stack gate dielectric and nanowire channels structure for the applications of transistor and nonvolatile memory. The proposed device named with NW SONOS-TFT has superior electrical characteristics of transistor and also can exhibit high program/erase (P/E) efficiency under adequate bias operation. The V-th decreases from 2.45 V to 1.76 V and subthreshold swing reduces from 0.57 V/decade to 0.42 V/decade. The programming V-th shift is improved from 2.2 V to 3.3 V at 14 V for 1 s and the erasing V-th shift is improved from -0.3 V to -1.3 V at -14 V for 1 s. The dramatic improvement can be attributed to the tri-gate structure and corner effect. In addition, the memory device has a promising data retention behavior at 85 degrees C and a 0.8 V memory window after 5 x 10(3) P/E cycles operations. Hence, the NW SONOS-TFT is suitable for application in the future system-on-panel display. (C) 2007 Elsevier B.V. All rights reserved.