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收集所有交通大學研究人員與學生個人或團體所發表之各項學術著作，涵蓋期刊論文、教師專書、學位論文等項。;;Collections of Publications of NCTU Researchers and Students Like Journal Papers and Thesis.

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Author: search.filters.author.Syu, Jin-SiangSubject: search.filters.subject.direct-conversion receiver

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    5-6 GHz 9.4 mW CMOS Direct-Conversion Passive-Mixer Receiver With Low-Flicker-Noise Corner
    (2012-01-01)
    Hsiao, Yu-Chih
    ;
    Meng, Chinchun
    ;
    Syu, Jin-Siang
    ;
    Lin, Chung-Yo
    ;
    Wong, Shyh-Chyi
    This paper demonstrates a low-power and low-flicker-noise direct-conversion receiver using double-balanced passive mixer. The deep-n-well vertical-NPN bipolar junction transistor is placed as at the input stage of the IF amplifier to reduce the flicker noise in the 0.18 um standard CMOS process. As a result, conversion gain achieves 50-dB gain when the LO power is 10 dBm and the noise figure is 7-dB at 100 kHz. The totally power consumption is 9.4 mW at 1.8 V voltage supply.
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    9.9-mA 5-6 GHz CMOS Sub-Harmonic Direct-Conversion Receiver Using Deep N-Well BJT
    (2014-01-01)
    Chang, Wei-Ling
    ;
    Meng, Chin-Chun
    ;
    Syu, Jin-Siang
    ;
    Wang, Chia-Ling
    ;
    Huang, Guo-Wei
    A low-power sub-harmonic direct-down receiver is demonstrated using 0.18 mu m CMOS technology. The dynamic range of the receiver is increased by incorporating voltage gain controls with wide tuning range at RF and IF stages. For the flicker noise problem, vertical-NPN bipolar junction transistors (BJTs) in standard CMOS process are employed as the mixer switching core and at the input stage of the subsequent IF VGA. As a result, this work achieves a 45 dB gain from 5-6 GHz with 6 dB noise floor. The total current consumption is 5.5 mA at 1.8 V supply voltage.
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    2.4-GHz 7.4-mW 300-kHz Flicker-Noise-Corner Direct Conversion Receiver Using 0.18 mu m CMOS and Deep-N-Well NPN BJT
    (2013)
    Chang, Wei-Ling
    ;
    Meng, Chin-Chun
    ;
    Syu, Jin-Siang
    ;
    Wang, Chia-Ling
    ;
    Huang, Guo-Wei
    A low-power low-flicker-noise receiver is demonstrated using 0.18 mu m CMOS technology. Vertical-NPN bipolar junction transistors (BJTs) in standard CMOS process are used to substitute the mixer switching core and the input stage of subsequent IF VGA. Compared with the conventional CMOS mixer, the excellent flicker noise performance is obtained. As a result, the receiver achieves a 47 dB voltage gain at 2.4-GHz, and the noise figure is 9.6 dB at IF=100 kHz and 5.6 dB for IF>300 kHz. The total current consumption is 4.3 mA at 1.8 V supply voltage.