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學術出版;;Publications

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收集所有交通大學研究人員與學生個人或團體所發表之各項學術著作，涵蓋期刊論文、教師專書、學位論文等項。;;Collections of Publications of NCTU Researchers and Students Like Journal Papers and Thesis.

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1994 - 19954

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Author: search.filters.author.TSAY, JCSubject: search.filters.subject.VLSI

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    AN OPTIMAL PARALLEL ALGORITHM FOR GENERATING PERMUTATIONS IN MINIMAL CHANGE ORDER
    (1994-03-01)
    TSAY, JC
    ;
    LEE, WP
    ;
    資訊工程學系
    ;
    Department of Computer Science
    Permutation generation is an important problem in combinatorial computing. In this paper we present an optimal parallel algorithm to generate all N! permutations of N objects. The algorithm is designed to be executed on a very simple computation model that is a linear array with N identical processors. Because of the simplicity and regularity of the processors, the model is very suitable for VLSI implementation. Another advantageous characteristic of this design is that it can generate all the permutations in minimal change order.
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    Item type:Item,
    AN OPTIMAL PARALLEL ALGORITHM FOR GENERATING PERMUTATIONS IN MINIMAL CHANGE ORDER
    (1994-03-01)
    TSAY, JC
    ;
    LEE, WP
    ;
    交大名義發表
    ;
    工學院
    ;
    National Chiao Tung University
    Permutation generation is an important problem in combinatorial computing. In this paper we present an optimal parallel algorithm to generate all N! permutations of N objects. The algorithm is designed to be executed on a very simple computation model that is a linear array with N identical processors. Because of the simplicity and regularity of the processors, the model is very suitable for VLSI implementation. Another advantageous characteristic of this design is that it can generate all the permutations in minimal change order.
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    A SYSTOLIC DESIGN FOR GENERATING PERMUTATIONS IN LEXICOGRAPHIC ORDER
    (1994-05-01)
    LEE, WP
    ;
    TSAY, JC
    ;
    工學院
    ;
    College of Engineering
    In this paper, we shall design a systolic algorithm for generating all N! permutations of N objects. The algorithm is time efficient, generates all permutations in lexicographic order, and can be executed on a simple computation model (systolic array). Furthermore, because the algorithm is systolic, it is suitable for VLSI implementation.
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    SOME NEW DESIGNS OF 2-D ARRAY FOR MATRIX MULTIPLICATION AND TRANSITIVE CLOSURE
    (1995-04-01)
    TSAY, JC
    ;
    CHANG, PY
    ;
    交大名義發表
    ;
    工學院
    ;
    National Chiao Tung University
    In this paper, we present some new regular iterative algorithms for matrix multiplication and transitive closure. With these algorithms, by spacetime mapping the 2-D arrays with 2N-1 and [(3N-1)/2] execution times for matrix multiplication can be obtained, Meanwhile, we can derive a 2-D array with 4N-2 execution time for transitive closure based on the sequential Warshall-Floyd algorithm. All these new 2-D arrays for matrix multiplication and transitive closure have the advantages of faster and more regular than other previous designs.