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Item type:Item, Formation of the distributed NiSiGe nanocrystals nonvolatile memory formed by rapidly annealing in N-2 and O-2 ambient(2010-10-01) ;Hu, Chih-Wei ;Chang, Ting-Chang ;Tu, Chun-Hao ;Chiang, Cheng-NengLin, Chao-ChengIn this work, electrical characteristics of the Ge-incorporated Nickel silicide (NiSiGe) nanocrystals memory device formed by the rapidly thermal annealing in N-2 and O-2 ambient have been studied. The trapping layer was deposited by co-sputtering the NiSi2 and Ge, simultaneously. Transmission electron microscope results indicate that the NiSiGe nanocrystals were formed obviously in both the samples. The memory devices show obvious charge-storage ability under capacitance-voltage measurement. However, it is found that the NiSiGe nanocrystals device formed by annealing in N-2 ambient has smaller memory window and better retention characteristics than in O-2 ambient. Then, related material analyses were used to confirm that the oxidized Ge elements affect the charge-storage sites and the electrical performance of the NCs memory. (C) 2010 Elsevier B.V. All rights reserved.Item type:Item, Nitric Acid Oxidized ZrO2 as the Tunneling Oxide of Cobalt Silicide Nanocrystal Memory Devices(2011-09-01) ;Hu, Chih-Wei ;Chang, Ting-Chang ;Tu, Chun-Hao ;Chen, Yang-DongLin, Chao-ChengIn this study, ZrO2 formed by the nitric acid oxidation method is proposed to be the tunneling oxide for nonvolatile memory device applications. The sputtered Zr thin film was oxidized by immersing in the nitric acid solution (HNO3:H2O = 1:10) for 60 s at room temperature. The quality of the formed ZrO2 was also extracted by the capacitance-voltage and current density-voltage measurements. Then, X-ray photoelectron spectroscopy has been used to confirm that the deposited Zr can be oxidized completely after the oxidation process. Moreover, a CoSi2 thin film was deposited on the nitric acid oxidized ZrO2 as the self-assembled layer of the memory device. After the device fabrication, the electrical and material characteristics of the CoSi2 nanocrystal memory devices have also been demonstrated and discussed.Item type:Item, Nitric Acid Oxidation of Si for the Tunneling Oxide Application on CoSi2 Nanocrystals Nonvolatile Memory(2010-01-01) ;Hu, Chih-Wei ;Chang, Ting-Chang ;Tu, Chun-Hao ;Chen, Yang-DongLin, Chao-ChengIn this work, nitric acid oxidation was studied to fabricate the tunneling oxide of nanocrystal memory devices. SiO2 about 4 nm thick was formed through oxidizing the sputtered Si film by immersing in nitric acid solution (HNO3:H2O=1:10) for 60 s. After oxide formation, a rapid thermal annealing process set at 700 degrees C for 30 s was used to improve oxide quality. In addition, the formed SiO2 film was analyzed by X-ray photoelectron, capacitance-voltage, and current density-voltage measurements to study the process of the nitric acid oxidation. After the investigation of the nitric acid oxidized SiO2, a 6 nm thick cobalt silicide thin film was deposited and aggregated on the formed SiO2 layer as the charge-trapping layer. The cobalt silicide nanocrystal memory device showed an obvious memory effect and good reliability, which confirms that the nitric acid oxidation method has potential for memory application.Item type:Item, High Density Ni Nanocrystals Formed by Coevaporating Ni and SiO2 Pellets for the Nonvolatile Memory Device Application(2010-01-01) ;Hu, Chih-Wei ;Chang, Ting-Chang ;Tu, Chun-Hao ;Huang, Yu-HaoLin, Chao-ChengWe propose a method to fabricate a Ni nanocrystal structure by simultaneously coevaporating Ni and SiO2 pellets. An 800 degrees C rapid thermal annealing was used to enhance the Ni nanocrystals to aggregate. Transmission electron microscopy indicates that the formed Ni nanocrystals show a high density distribution of about 4.5x10(12) cm(-2). Then, the memory device using the Ni nanocrystals as charge-trapping centers was fabricated. The Ni nanocrystal memory device has an obvious memory window under capacitance-voltage measurement. X-ray photoelectron spectroscopy confirms the memory effect results from the Ni nanocrystals embedded in the SiO2 dielectric layer. Moreover, related reliability characteristics have been extracted.Item type:Item, Modifying Indium-Tin-Oxide by Gas Cosputtering for Use as an Insulator in Resistive Random Access Memory(2016-11) ;Chen, Po-Hsun ;Chang, Kuan-Chang ;Chang, Ting-Chang ;Tsai, Tsung-MingPan, Chih-HungIn this paper, indium-tin-oxide (ITO) was used to act as both insulator and top electrode in resistive random access memory (RRAM) on identical bottom substrates. This is achieved by cosputtering an ITO target with nitride (N-2) or oxygen (O-2) gas as the insulator; then capping by an ITO electrode, such that both the rectifier and RRAM characteristics can be achieved before and after a forming process, respectively. In contrast, using pure ITO as an insulator does not exhibit RRAM behavior. To verify the rectifier and RRAM characteristics, material analyses and electrical measurements at various temperatures were conducted. Reliability tests including retention and endurance were also applied to verify the resistance switching stability. Finally, the rectifier and RRAM conduction models were proposed to examine the resistance switching behaviors. By applying the ITO material as both electrode and insulator, the resistance switching characteristic with high reliability is thus obtained.Item type:Item, Improvements in the reliability of a-InGaZnO thin-film transistors with triple stacked gate insulator in flexible electronics applications(2015-11-30) ;Chen, Hua-Mao ;Chang, Ting-Chang ;Tai, Ya-Hsiang ;Chen, Kuan-FuChiang, Hsiao-ChengThis study examined the impact of the low-temperature stacking gate insulator on the gate bias instability of a-InGaZnO thin film transistors in flexible electronics applications. Although the quality of SiNx at low process/deposition temperature is better than that of SiOx at similarly low process/deposition temperature, there is still a very large positive threshold voltage (V-th) shift of 9.4 V for devices with a single low-temperature SiNx gate insulator under positive gate bias stress. However, a suitable oxide-nitride-oxide-stacked gate insulator exhibits a Vth shift of only 0.23 V. This improvement results from the larger band offset and suitable gate insulator thickness that can effectively suppress carrier trapping behavior. (C) 2015 Elsevier B.V. All rights reserved.Item type:Item, Formation of the distributed NiSiGe nanocrystals nonvolatile memory formed by rapidly annealing in N(2) and O(2) ambient(2010-10-01) ;Hu, Chih-Wei ;Chang, Ting-Chang ;Tu, Chun-Hao ;Chiang, Cheng-NengLin, Chao-ChengIn this work, electrical characteristics of the Ge-incorporated Nickel silicide (NiSiGe) nanocrystals memory device formed by the rapidly thermal annealing in N(2) and O(2) ambient have been studied. The trapping layer was deposited by co-sputtering the NiSi(2) and Ge, simultaneously. Transmission electron microscope results indicate that the NiSiGe nanocrystals were formed obviously in both the samples. The memory devices show obvious charge-storage ability under capacitance-voltage measurement. However, it is found that the NiSiGe nanocrystals device formed by annealing in N(2) ambient has smaller memory window and better retention characteristics than in O(2) ambient. Then, related material analyses were used to confirm that the oxidized Ge elements affect the charge-storage sites and the electrical performance of the NCs memory. (C) 2010 Elsevier B.V. All rights reserved.Item type:Item, Nitric Acid Oxidized ZrO(2) as the Tunneling Oxide of Cobalt Silicide Nanocrystal Memory Devices(2011-09-01) ;Hu, Chih-Wei ;Chang, Ting-Chang ;Tu, Chun-Hao ;Chen, Yang-DongLin, Chao-ChengIn this study, ZrO(2) formed by the nitric acid oxidation method is proposed to be the tunneling oxide for nonvolatile memory device applications. The sputtered Zr thin film was oxidized by immersing in the nitric acid solution (HNO(3):H(2)O = 1:10) for 60 s at room temperature. The quality of the formed ZrO(2) was also extracted by the capacitance-voltage and current density-voltage measurements. Then, X-ray photoelectron spectroscopy has been used to confirm that the deposited Zr can be oxidized completely after the oxidation process. Moreover, a CoSi(2) thin film was deposited on the nitric acid oxidized ZrO(2) as the self-assembled layer of the memory device. After the device fabrication, the electrical and material characteristics of the CoSi(2) nanocrystal memory devices have also been demonstrated and discussed.Item type:Item, Temperature dependence of thin-film transistors electrical characteristics with multiple nano-wire channels(2005) ;Yang, Che-Yu ;Wu, Yung-Chun ;Chang, Ting-Chang ;Liu, Po-TsunChen, Chi-ShenWe have investigated the temperature dependent electrical characteristics of lightly-doped drain (LDD) polysilicon thin-film transistors (poly-Si TFTs) with a series of multi-channel with different widths from 25 degrees C to 175 degrees C. The ten 67 nm-wide spilt channels TFT has best transfer characteristics, because of its robust trigate control and grain boundary defects is the lowest, due to its split nan-wires structure with effective NH3 plasma passivation.Item type:Item, Paraffin wax passivation layer improvements in electrical characteristics of bottom gate amorphous indium-gallium-zinc oxide thin-film transistors(2011-12-30) ;Chang, Geng-Wei ;Chang, Ting-Chang ;Syu, Yong-En ;Tsai, Tsung-MingChang, Kuan-ChangIn this research, paraffin wax is employed as the passivation layer of the bottom gate amorphous indium-gallium-zinc oxide thin-film transistors (a-IGZO TFTs), and it is formed by sol-gel process in the atmosphere. The high yield and low cost passivation layer of sol-gel process technology has attracted much attention for current flat-panel-display manufacturing. Comparing with passivation-free a-IGZO TFTs, passivated devices exhibit a superior stability against positive gate bias stress in different ambient gas, demonstrating that paraffin wax shows gas-resisting characteristics for a-IGZO TFTs application. Furthermore, light-induced stretch-out phenomenon for paraffin wax passivated device is suppressed. This superior stability of the passivated device was attributed to the reduced total density of states (DOS) including the interfacial and semiconductor bulk trap densities. (C) 2011 Elsevier B.V. All rights reserved.