學術出版;;Publications

Permanent URI for this communityhdl:11536/1

收集所有交通大學研究人員與學生個人或團體所發表之各項學術著作，涵蓋期刊論文、教師專書、學位論文等項。;;Collections of Publications of NCTU Researchers and Students Like Journal Papers and Thesis.

Browse

🏛️國立陽明交通大學機構典藏

Search Results

Now showing 1 - 10 of 17

PPD: A practical parallel loop detector for parallelizing compilers on multiprocessor systems
(1996-11-01)
Yang, CT
;
Wu, CT
;
Tseng, SS
;
資訊工程學系
;
Department of Computer Science
It is well known that extracting parallel loops plays a significant role in designing parallelizing compilers. The execution efficiency of a loop is enhanced when the loop can be executed in parallel or partial parallel, like a DOALL or DOACROSS loop. This paper reports on the practical parallelism detector (PPD) that is implemented in PFPC (a portable FORTRAN parallelizing compiler running on OSF/1) at NCTU to concentrate on finding the parallelism available in loops. The PPD can extract the potential DOALL and DOACROSS loops in a program by invoking a combination of the ZIV test and the I test for verifying array subscripts. Furthermore, if DOACROSS loops are available, an optimization of synchronization statement is made. Experimental results show that PPD is more reliable and accurate than previous approaches.
Quasi-two-dimensional simulation of scour and deposition in alluvial channels - Closure
(1999-02-01)
Lee, HY
;
Hsieh, HM
;
Yang, JC
;
Yang, CT
;
土木工程學系
An intelligent parallel loop scheduling for parallelizing compilers
(2000-03-01)
Fann, YW
;
Yang, CT
;
Tseng, SS
;
Tsai, CJ
;
資訊工程學系
In this paper we propose a knowledge-based approach to solving loop-scheduling problems. A rule-based system, called IPLS, is developed by combining a repertory grid and an attribute ordering table to construct a knowledge base. IPLS chooses an appropriate scheduling algorithm by inferring some features of loops and assigning parallel loops to multiprocessors to achieve significant speedup. Because more attributes are proposed, the accuracy of selection of an appropriate scheduling method is improved. In addition, the refined IPLS system can automatically adjust the attributes in the knowledge base according to profile information; therefore, IPLS has the capability of feedback learning. The experimental results show that our approach can achieve greater speedup on multiprocessor systems than can others.
Using knowledge-based systems for research on parallelizing compilers
(2001-03-01)
Yang, CT
;
Tseng, SS
;
Fann, YW
;
Tsai, TK
;
Hsieh, MH
The main function of parallelizing compilers is to analyze sequential programs, in particular the loop structure, to detect hidden parallelism and automatically restructure sequential programs into parallel subtasks that are executed on a multiprocessor. This article describes the design and implementation of an efficient parallelizing compiler to parallelize loops and achieve high speedup rates on multiprocessor systems. It is well known that the execution efficiency of a loop can be enhanced if the loop is executed in parallel or partially parallel, such as in a DOALL or DOACROSS loop. This article also reviews a practical parallel loop detector (PPD) that is implemented in our PFPC on finding the parallelism in loops. The PPD can extract the potential DOALL and DOACROSS loops in a program by verifying array subscripts. In addition, a new model by using knowledge-based approach is proposed to exploit more loop parallelisms in this paper. The knowledge-based approach integrates existing loop transformations and loop scheduling algorithms to make good use of their ability to extract loop parallelisms. Two rule-based systems, called the KPLT and IPLS, are then developed using repertory grid analysis and attribute-ordering tables respectively, to construct the knowledge bases. These systems can choose an appropriate transform and loop schedule, and then apply the resulting methods to perform loop parallelization and obtain a high speedup rate. For example, the IPLS system can choose an appropriate loop schedule for running on multiprocessor systems. Finally, a runtime technique based on the inspector/executor scheme is proposed in this article for finding available parallelism on loops. Our inspector can determine the wavefronts of a loop with any complex indirected array-indexing pattern by building a DEF-USE table. The inspector is fully parallel without any synchronization. Experimental results show that the new method can resolve any complex data dependence patterns where no previous research can. One of the ultimate goals is to construct a high-performance and portable FORTRAN parallelizing compiler on shared-memory multiprocessors. We believe that our research may provide more insight into the development of a highperformance parallelizing compiler Copyright (C) 2001 John Wiley & Sons, Ltd.
A hybrid parallel loop scheduling scheme on grid environments
(2005)
Shih, WC
;
Yang, CT
;
Tseng, SS
;
資訊工程學系
;
Department of Computer Science
Effective loop-scheduling can significantly reduce the total execution time of a program on grid environments, especially for loop-intensive applications. This paper describes a two-phased method, named HPLS (Hybrid Parallel Loop Scheduling), to dynamically schedule loop iterations of a program on grid environments. In the first phase, most of the workload is dispatched to each node for execution according to its performance. Then, some well-known self-scheduling scheme is utilized to schedule the remaining workload. Experimental results showed that in most cases our approach could produce more efficient scheduling than previous schemes on our testbed grid. In addition, the results suggest that our approach is suitable for loop scheduling on grid environments.
A performance-based parallel loop self-scheduling on grid computing environments
(2005)
Shih, WC
;
Yang, CT
;
Tseng, SS
;
資訊工程學系
;
Department of Computer Science
Efficient loop scheduling on parallel and distributed systems depends mostly on load balancing, especially on heterogeneous PC-based cluster and grid computing environments. In this paper, a general approach, named Performance-Based Parallel Loop Self-Scheduling (PPLSS), was given to partition workload according to performance of grid nodes. This approach was applied to three types of application programs, which were executed on a testbed grid. Experimental results showed that our approach could execute efficiently for most scheduling parameters when estimation of node performance was accurate.
An efficient network information model using NWS for grid computing environments
(2005)
Yang, CT
;
Shih, PC
;
Chen, SY
;
Shih, WC
;
資訊工程學系
Grid computing technologies enable large-scale aggregation and sharing of resources via wide-area networks focused on sharing computational, data, and other resources to form general-purpose services for users. In this paper, we address network information gathering and focus on providing approximate measurement models for network-related information using Network Weather Service (NWS) for future scheduling and benchmarking. We propose a network measurement model for gathering network-related information including bandwidth, latency, forecasting, error rates, etc., without generating excessive system overhead. We consider inaccuracies in real-world network values in generating approximation values for future use.
PPD: A practical parallel loop detector for parallelizing compilers
(1996)
Wu, CT
;
Yang, CT
;
Tseng, SS
;
資訊工程學系
;
Department of Computer Science
A fuzzy inductive learning algorithm for parallel loop scheduling
(1997)
Tsai, CJ
;
Tseng, SS
;
Wang, CH
;
Yang, CT
;
Jiang, MF
The conventional symbolic learning algorithm can not infer data that contains fuzzy information. In the past few years, we have designed a parallel loop scheduling based upon knowledge based approach that is called KPLS to choose an appropriate schedule for different loop to assign loop iterations to a multiprocessor system for achieving high speedup rates. Unfortunately, we found that these attributes that were applied in KPLS contain some fuzzy information, which are inapplicable to the traditional symbolic learning strategy for inferring some concept descriptions. In this paper, we apply fuzzy set concept to AQR learning algorithm that is called FAQR. FAQR which can induce fuzzy linguistic rules from fuzzy instances is then proposed to solve the above parallel loop scheduling problem. Some promising inference rules have been found and applied to infer the choice of parallel loop scheduling. Besides, we apply FAQR in IRIS Flower Classification Problem. Experimental results show that our method yields high accuracy in both different domains.
IPLS: An intelligent parallel loop scheduling for multiprocessor systems
(1998)
Fann, YW
;
Yang, CT
;
Tsai, CJ
;
Tseng, SS
;
資訊工程學系
In this paper we propose a knowledge-based approach for solving loop-scheduling problems. A rule-based system, called the IPLS, is developed by repertory grid and attribute ordering table to construct the knowledge base. The IPLS chooses an appropriate scheduling algorithm by inferring some features of loops and assign parallel loops on multiprocessors for achieving high speedup. In addition, the refined system of IPLS can automatically adjust the attributes in, knowledge base according to profile information; therefore IPLS has the feedback-learning ability.

學術出版;;Publications

Browse

Filters

Settings

Sort By

Results per page

🏛️國立陽明交通大學機構典藏

Search Results