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🏛️國立陽明交通大學機構典藏

Author: search.filters.author.Yu, Shao-MingSubject: search.filters.subject.modeling and simulation

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Now showing 1 - 3 of 3
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    Comparison of random-dopant-induced threshold voltage fluctuation in nanoscale single-, double-, and surrounding-gate field-effect transistors
    (2006-09-01)
    Li, Yiming
    ;
    Yu, Shao-Ming
    ;
    資訊工程學系
    ;
    電信工程研究所
    ;
    Department of Computer Science
    In this study, we explore random-dopant-induced threshold voltage fluctuation by solving a quantum correction model. Fluctuation of the threshold voltage for three nanoscale transistors, single-, double-, and surrounding-gate (SG, DG, and AG) metal-oxide-semiconductor field-effect transistors (MOSFETs) are computationally compared. To calculate the variance of the threshold voltages of the SG, DG, and AG MOSFETs, a quantum correction model under equilibrium conditions is expanded and numerically solved using perturbation and monotone iterative methods. Fluctuation of the threshold voltage resulting from the random dopant, gate oxide thickness, channel film thickness, gate channel length, and device width are calculated for the three devices. Quantum mechanical and classical results give similar predictions for fluctuation of the threshold voltage with respect to different parameters including the dimensions of the device and the channel doping. Fluctuation increases when the channel doping concentration, channel film thickness, and gate oxide thickness increase, On the other hand, it decreases when the channel length and device width increase. Calculation results of the quantum correction model are quantitatively higher than those of classical estimation in accordance with different quantum confinement effects in nanoscale SG, DG, and AG MOSFETs. It is found that the AG MOSFET has the smallest threshold voltage fluctuation among the three device structures due to its good channel controllability. In contrast to the conventional quantum Monte Carlo approach and the small-signal analysis of the Schrodinger-Poisson equations, this computationally cost-effective quantum correction approach shows acceptable accuracy and is ready for industrial technology computer-aided design application.
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    Numerical simulation of static noise margin for a six-transistor static random access memory cell with 32nm fin-typed field effect transistors
    (2007)
    Li, Yiming
    ;
    Hwang, Chih-Hong
    ;
    Yu, Shao-Ming
    ;
    電信工程研究所
    ;
    Institute of Communications Engineering
    We in this paper for the first time explore the static noise margin (SNM) of a six-transistor (6T) static random access memory (SRAM) cell with nanoscale silicon-on-insulator (SOI) fin-typed field effect transistors (FinFETs). The SNM is calculated with respect to the supply voltage, operating temperature, and cell ratio by performing a three-dimensional mixed-mode simulation. To include the quantum mechanical effect, the density-gradient equation is simultaneously solved in the coupled device and circuit equations. The standard deviation (sigma-(S N M)) of SNM versus device's channel length is computed, based upon the design of experiment and response surface methodology. Compared with the result of SNM for SRAM with 32nm planar metal-oxide-semiconductor field effect transistors, SRAM with SOI FinFETs quantitatively exhibits higher SNM and lower sigma-(S N M). Improvement of characteristics resulting from good channel controllability implies that SRAM cells fabricated with FinFETs continuously maintains cell stability in sub-32nm technology nodes.
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    Process-variation- and random-dopants-induced threshold voltage fluctuations in nanoscale CMOS and SOI devices
    (2007-09-01)
    Li, Yiming
    ;
    Yu, Shao-Ming
    ;
    Chen, Hung-Ming
    ;
    資訊工程學系
    ;
    電信工程研究所
    In this paper, we investigate the threshold voltage fluctuation for nanoscale metal-oxide-semiconductor field effect transistor (MOSFET) and silicon-on-insulator (SOI) devices. The threshold voltage fluctuation comes from random dopant and short channel effects. The ran dom-dopant- induced fluctuation is due to the random nature of ion implantation. The gatelength deviation and the line-edge roughness are mainly resulted from the short-channel effect. For the SOI devices, we should also consider the body thickness variation. In our investigation, the metal gate with high-K material MOSFET is a good choice to reduce fluctuation of threshold voltage when comparing to the poly gate MOSFET and thin-body SOI devices.