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收集所有交通大學研究人員與學生個人或團體所發表之各項學術著作，涵蓋期刊論文、教師專書、學位論文等項。;;Collections of Publications of NCTU Researchers and Students Like Journal Papers and Thesis.

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    A 270-GHz CMOS Triple-Push Ring Oscillator With a Coupled-Line Matching Network
    (2019-09-01)
    Kim, Sooyeon
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    Yoon, Daekeun
    ;
    Rieh, Jae-Sung
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    國際半導體學院
    ;
    International College of Semiconductor Technology
    A design procedure is proposed for triple-push ring oscillators, and an oscillator employing a coupled line-matching network is developed following the procedure. This stepwise procedure, which uses power-dependent Z-parameters of transistors, is applied to the design of each amplifier stage constituting a ring oscillator based on its steady-state oscillation condition. It is verified with both L-section and T-section topologies assumed for the load of the amplifier stages of a given triple-push ring oscillator, and the differences between the two topologies are compared. Based on the procedure, a 270 GHz triple-push ring oscillator that employs coupled lines for matching networks has been developed in a 65-nm complementary metal-oxide-semiconductor (CMOS) process. The circuit benefits from the advantages of coupled lines such as compact area and simplified layout. The fabricated oscillator exhibits a measured oscillation frequency of around 270 GHz and output power of -10.9 dBm, with phase noise of -96 dBc/Hz at 10 MHz offset.
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    Photon-Detection-Probability Simulation Method for CMOS Single-Photon Avalanche Diodes
    (2020-01-01)
    Hsieh, Chin-An
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    Tsai, Chia-Ming
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    Tsui, Bing-Yue
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    Hsiao, Bo-Jen
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    Lin, Sheng-Di
    Single-photon avalanche diodes (SPADs) in complementary metal-oxide-semiconductor (CMOS) technology have excellent timing resolution and are capable to detect single photons. The most important indicator for its sensitivity, photon-detection probability (PDP), defines the probability of a successful detection for a single incident photon. To optimize PDP is a cost- and time-consuming task due to the complicated and expensive CMOS process. In this work, we have developed a simulation procedure to predict the PDP without any fitting parameter. With the given process parameters, our method combines the process, the electrical, and the optical simulations in commercially available software and the calculation of breakdown trigger probability. The simulation results have been compared with the experimental data conducted in an 800-nm CMOS technology and obtained a good consistence at the wavelength longer than 600 nm. The possible reasons for the disagreement at the short wavelength have been discussed. Our work provides an effective way to optimize the PDP of a SPAD prior to its fabrication.
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    Time-Correlated Crosstalk Measurements between CMOS Single-Photon Avalanche Diodes
    (2018-01-01)
    Wu, Dai-Rong
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    Tsai, Chia-Ming
    ;
    Lin, Sheng-Di
    ;
    電子工程學系及電子研究所
    ;
    Department of Electronics Engineering and Institute of Electronics
    We investigate time-resolved crosstalk probability between single-photon avalanche diodes in CMOS technology. The time-correlated crosstalk measurements reveal an unusual double-peak feature. This behavior becomes more significant at higher excess bias voltages and shorter device-to-device distance and its physical reason will be discussed.
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    Crosstalk Between Single-Photon Avalanche Diodes in a 0.18-mu m High-Voltage CMOS Process
    (2018-02-01)
    Wu, Dai-Rong
    ;
    Tsai, Chia-Ming
    ;
    Huang, Yi-Hsiang
    ;
    Lin, Sheng-Di
    ;
    電子工程學系及電子研究所
    Crosstalk between single-photon avalanche diodes (SPADs) fabricated by the standard CMOS process is extensively investigated. The dependence of device structure, device-to-device distance, and bias voltage on crosstalk has been experimentally studied. Our work reveals that direct-path optical crosstalk dominates in these CMOS SPADs, which is also confirmed with the first time-correlated crosstalk measurement. This work is valuable for SPAD array design and optimization in CMOS technology.
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    The design of a 2-V 900-MHz CMOS bandpass amplifier
    (2001)
    Cheng, Y
    ;
    Wu, CY
    ;
    Gong, J
    ;
    電子工程學系及電子研究所
    ;
    Department of Electronics Engineering and Institute of Electronics
    A 900 MHz low-power CMOS bandpass amplifier suitable for the applications of RF front-end in wireless communication receivers is proposed and analyzed. In this design, the temperature compensation circuit is used to stabilize the amplifier gain so that the overall amplifier has a good temperature stability. Moreover, the compact tunable positive-feedback circuit is connected to the integrated spiral inductor to generate the negative resistance and enhance its Q value. The simple diode varactor circuit is adopted for center-frequency tuning. These two improved circuits can reduce the power dissipation of the amplifier. An experimental chip fabricated by 0.5 mum double-poly-double-metal CMOS technology occupies a chip area of 500 x 500 mum(2); chip area. The measured results have verified the performance of the fabricated CMOS bandpass amplifier. Under a 2-V supply voltage, the measured quality factor is tunable between 4.5 and 50 and the tunable frequency range is between 845 MHz and 915 MHz. At Q = 30, the measured S-21 is 20 dB whereas the noise figure is 5.2 dB in the passband. The gain variation is less than 4 dB in the range of 0-80 degreesC. The dc power dissipation is 35 mW. Suitable amplifier gain, low power dissipation, and good temperature stability make the proposed bandpass amplifier quite feasible in RF front-end applications.