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    Dual-band sigma-delta modulator for wideband receiver applications
    (2004-02-01)
    Chiang, JS
    ;
    Chou, PC
    ;
    Chang, TH
    ;
    電控工程研究所
    ;
    Institute of Electrical and Control Engineering
    This work presents a new sigma-delta modulator (SDM) architecture for a wide bandwidth receiver. This architecture contains dualbandwidth for W-CDMA and GSM system applications. Low-distortion swing-suppressing SDM and interpolative SDM cascaded units are used together. Using the low-distortion swing-suppressing technique, the resolution can be improved even under non-linearity effects. The interpolative SDM extends the signal bandwidth and represses the high-band noise. The SDM used in the W-CDMA and GSM applications was designed and simulated using 0.25-mum 1P5M CMOS technology. The simulated peak SNDR of W-CDMA and GSM are 72/70 dB and 82/84 dB in Low-IF/Zero-IF standards.
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    A wide input-range Sigma Delta modulator for applications to spread-spectrum clock generator
    (2006)
    Kao, Yao-Huang
    ;
    Hsieh, Yi-Bin
    ;
    傳播研究所
    ;
    Institute of Communication Studies
    A spread-spectrum clock generator (SSCG) using fractional-N phase-locked loop (PLL) with an extended range sigma-delta (EA) modulator is presented in this paper. The proposed EA modulator simply adds an extra output bit in the first stage modulator. It can enlarge the input range about three times as compared to the conventional modulator and solve the saturation problem when the input exceeds the boundary of the conventional modulator. The proposed SSCG has been fabricated in TSMC 0.35-um double-poly quadruple-metal CMOS process with output frequency of 300MHz. The active area is 0.63x4.62 mm(2) and the power consumption is 17.5mW.