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收集所有交通大學研究人員與學生個人或團體所發表之各項學術著作，涵蓋期刊論文、教師專書、學位論文等項。;;Collections of Publications of NCTU Researchers and Students Like Journal Papers and Thesis.

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Now showing 1 - 10 of 27
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    High-reliability gate driver on array using noise sharing of precharging node for thin film transistor-liquid crystal display application
    (1970-01-01)
    Zheng, Guang-Ting
    ;
    Liu, Po-Tsun
    ;
    Du, Chia-Heng
    ;
    Wang, Teng-Yu
    ;
    顯示科技研究所
    A hydrogenated amorphous silicon (a-Si:H) thin-film transistor (TFT) gate driver with negative bias stress on precharging node for noise sharing with high-reliability 10.7-in. automotive display has been proposed. The proposed circuit is composed of precharging block, pull-up and pull-down block, and noise-free block. The precharging block not only starts up the gate driver but also reduces noise with 33% duty cycle. Duplicate output signals are responsible for turning on next stage to decrease the loading of output of gate line. Moreover, negative bias voltage recovering of TFTs could be created by setting another lower voltage source to lower the threshold voltage degradation of TFTs. According to lifetime test results, the proposed gate driver of 708 stages passes the extreme temperature range test (90 degrees C and -40 degrees C) for simulation and -40 degrees C for measurement and remains stable over 800 h at 90 degrees C test. Finally, this design is successfully demonstrated in a 10.7-in. HD (1280 x RGB x 720) TFT-LCD panel.
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    Total-Dose Effect of X-ray Irradiation on Low-Temperature Polycrystalline Silicon Thin-Film Transistors
    (2020-06-01)
    Tai, Ya-Hsiang
    ;
    Yeh, Shan
    ;
    Huang, Shih-Hsuan
    ;
    Chang, Ting-Chang
    ;
    電機學院
    In this paper, the total-dose effect of X-ray irradiation on low-temperature polycrystalline-silicon (LTPS) thin film transistors (TFTs) is studied. Experiments under different conditions, including fixed intensity, fixed time, fixed total dose, short shot with different frequencies and high/low intensity for short/long time were performed and analyzed. With an increase of the irradiation dose, the threshold voltage (Vth) shifts negatively, the subthreshold swing (S.S.) degrades and the field effect mobility decreases owing to positive trapped charges and interface traps. All magnitude of negative shifts of (Vth), (S. S.) and field effect mobility for LTPS TFTs are well correlated to the total accumulated dose. The results are consistent with (Vth) shift due to trapped holes and the interface traps for mobility.
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    LTPS Active Pixel Circuit With Threshold Voltage Compensation for X-Ray Imaging Applications
    (2019-10-01)
    Tai, Ya-Hsiang
    ;
    Lin, Chi-Hao
    ;
    Yeh, Shan
    ;
    Tu, Cheng-Che
    ;
    Karim, Karim S.
    In this article, we proposed a low-temperature poly-silicon (LTPS) active pixel sensor (APS) circuit with threshold voltage (V-th) compensation. LTPS thin-film transistors (TFTs) are known to degrade under long-term irradiation and this is quantified. Simulation results and experimental data confirm that the proposed APS circuit compensates the instability of LTPS TFTs and is a promising, high-performance alternative to current amorphous silicon (a-Si) pixel-based X-ray detectors.
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    Negative threshold voltage shift for LTPS TFTs under x-ray irradiation and gate bias
    (2019-09-01)
    Tai, Ya-Hsiang
    ;
    Yeh, Shan
    ;
    Chan, Po-Chun
    ;
    Li, Yi-Shen
    ;
    Huang, Shih-Hsuan
    In this paper, the behavior of the low-temperature polycrystalline-silicon (LTPS) thin film transistors (TFTs) during x-ray irradiation and gate bias voltage (V-G) simultaneously is analyzed. Both n-type and p-type LTPS TFTs show negative shifts of threshold voltage under same dose of x-ray irradiation, regardless of the V-G polarity, while the field effect mobility of n-type LTPS TFT keeps fairly well. The degradation of subthreshold swing is attributed to the interface states, which can be repaired by 300 degrees C annealing. A model is proposed to explain the results for different V-G, and verified by changing the thickness of the gate oxide. More irradiation-induced holes are trapped by the far defects owing to the electric field. This study can be helpful to develop more stable devices or circuits for the application of x-ray image sensors.
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    Effects of Crystallinity on the Electrical Characteristics of Counter-Doped Polycrystalline Germanium Thin-Film Transistor via Continuous-Wave Laser Crystallization
    (2019-01-01)
    Li, Yi-Shao
    ;
    Wu, Chun-Yi
    ;
    Liao, Chan-Yu
    ;
    Luo, Jun-Dao
    ;
    Chuang, Kai-Chi
    The crystallinity of polycrystalline germanium (poly-Ge) films were demonstrated through continuous-wave laser crystallization (CLC) with Gaussian-distribution beam profile. The different grain sizes of CLC poly-Ge were observed in their three crystallization regions, which were 2 mu m, 680 nm, and 90 nm for the central, transition, and edge regions, respectively. Furthermore, the relation between crystallinity and carrier types in these three regions of counter-doped CLC poly-Ge films were investigated. In the central and transition regions, the CLC poly-Ge films with relatively low hole concentration were easily converted to n-type poly-Ge films through a counter-doping process. In contrast, the edge region with poor crystallinity exhibited p-type behavior due to high defect-generated hole concentration. According to these material properties of counter-doped CLC poly-Ge films, the corresponding transfer characteristics of p-channel poly-Ge thin-film transistor for three crystallization regions were further investigated. Subsequently, high-performance p-channel poly-Ge thin-film transistors in the central region exhibited a superior field-effect mobility of 792.2 cm(2)/V-s.
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    Submicrometer p-Type SnO Thin-Film Transistors Fabricated by Film Profile Engineering Method
    (2019-04-01)
    Wu, Ming-Hung
    ;
    Lin, Horng-Chih
    ;
    Li, Pei-Wen
    ;
    電子工程學系及電子研究所
    ;
    Department of Electronics Engineering and Institute of Electronics
    We reported the fabrication of submicrometer p-type tin monoxide (SnO) thin-film transistors (TFTs) with a channel length of 0.2 mu m for back-end-of-line applications using a film profile engineering (FPE) approach. Material analyses indicate that the as-deposited SnO films are amorphous, while be transformed to polycrystalline after a thermal annealing in oxygen ambient. Fabricated p-type SnO FPE-TFTs of a channel length of 0.2 mu m were manifested with ON/OFF current ratio higher than 105 and subthreshold slope of 320 mV/decade, superior to the data of submicrometer SnO devices ever reported. The extracted field-effect mobility is about 0.25 cm(2)/V.s. After ruling out the influence of source/drain series resistance, the intrinsic field-effect mobility is found to be about 1 cm(2)/V.s.
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    A Novel p-n-Diode Structure of SONOS-Type TFT NVM With Embedded Silicon Nanocrystals
    (2010-11-01)
    Chiang, Tsung-Yu
    ;
    Ma, William Cheng-Yu
    ;
    Wu, Yi-Hong
    ;
    Wang, Kuan-Ti
    ;
    Chao, Tien-Sheng
    In this letter, for the first time, a novel p-n-diode (PND) structure of SONOS-type thin-film transistor (TFT) nonvolatile memory (NVM) with embedded silicon nanocrystals (Si-NCs) in the silicon nitride layer using an in situ method is successfully demonstrated. This novel structure has many advantages, including high density and suitability for 3-D circuit integration. Hot-electron injection and hot-hole injection are used as the program and erase methods, respectively. The sensing current of the three-terminal PND-TFT NVM is 10(-7) A by the band-to-band tunneling current. A much larger memory window (> 12 V) and good data retention time (> 10(8) s for 12% charge loss) are exhibited. The device appears to have great potential for system-on-panel applications.
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    High-Performance Poly-Si Nanowire Thin-Film Transistors Using the HfO2 Gate Dielectric
    (2011-03-01)
    Lee, Chen-Ming
    ;
    Tsui, Bing-Yue
    ;
    電子工程學系及電子研究所
    ;
    Department of Electronics Engineering and Institute of Electronics
    High-performance polycrystalline-silicon (poly-Si) nanowire (NW) thin-film transistors (TFTs) using hafnium dioxide (HfO2) as gate dielectric is successfully fabricated for the first time. The excellent short-channel characteristics are attributed to the high-kappa gate dielectric, ultrathin poly-SiNW channel thickness, and omega-shaped gate structure. The record high driving capability of 549 mu A/mu m results from the ultrashort gate length (L-G), thin equivalent oxide thickness, and Ni silicide metal source/drain. This letter reveals the opportunity of high-performance poly-Si TFT circuits for system-on-panel and 3-D integrated circuit (3-D IC) applications.
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    High-Performance Germanium Thin-Film Transistors With Single-Crystal-Like Channel via Continuous-Wave Laser Crystallization
    (2018-12-01)
    Li, Yi-Shao
    ;
    Wu, Chun-Yi
    ;
    Liao, Chan-Yu
    ;
    Huang, Wen-Hsien
    ;
    Shieh, Jia-Min
    This letter reports of the fabrication of high-performance p-channel polycrystalline germanium (poly-Ge) thin-film transistors (TFTs) using continuous-wave laser crystallization (CLC). During the CLC process, the direction of crystallization matches the direction of laser scanning due to a strong temperature gradient in the melting region. This makes it possible to fabricate high-quality poly-Ge thin films with 1-D longitudinal grains as large as 2 mu m x 20 mu m. We fabricated the proposed p-channel CLC Ge TFTs with channel width of 0.7 mu m and a channel length each of 0.7 mu m. Consequently, the proposed p-channel CLC Ge TFTs with single-crystal-like channel fabricated on a longitudinal grain with biaxial tensile strain achieved a superior field-effect mobility of 1014.9 cm(2/)V-s.
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    Comprehensive Study of Pi-Gate Nanowires Poly-Si TFT Nonvolatile Memory With an HfO2 Charge Trapping Layer
    (2011-03-01)
    Chen, Lun-Jyun
    ;
    Wu, Yung-Chun
    ;
    Chiang, Ji-Hong
    ;
    Hung, Min-Feng
    ;
    Chang, Chin-Wei
    This work demonstrates the feasibility of a polycrystalline silicon thin-film transistor (poly-Si TFTs) nonvolatile memory (NVM) that utilizes a Pi-shaped gate (Pi-gate) and multiple nanowire channels with a HfO2 charge-trapping layer. The TFT NVM with the Pi-gate nanowires (NWs) structure has a higher program/erase (P/E) efficiency than that of the conventional single-channel TFT NVM; the memory window can achieve 2.3 V, only needs a programming time of 1 mu s. This high P/E efficiency follows from the improved gate control of the Pi-gate structure. A Pigate NWs poly-Si TFT NVM with a Si3N4 charge-trapping layer was also fabricated. Since HfO2 has a deeper conduction band than Si3N4, the device with the HfO2 charge-trapping layer has a higher programming efficiency and the better retention characteristics than that with the Si3N4 charge-trapping layer. Additionally, the high programming efficiency allows the device with the HfO2 charge-trapping layer to undergo more P/E cycles than that with the Si3N4 charge-trapping layer.