🏛️國立陽明交通大學機構典藏

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A high-speed 850-nm optical receiver by integrating Si photodiode and CMOS IC
(2008-01-01)
Hsin, Y. M.
;
Huang, W. K.
;
Liu, Y. C.
;
Yan, B. E.
;
Chen, W. Z.
In this work, three approaches are proposed to implement high-speed 850-nm optical receivers fully in standard bulk 0.18 pm silicon (Si) CMOS technology. In the first approach, the lateral p-i-n photodiode (PD) with designed block well to limit the photocarriers being generated from the laterally depleted regions is integrated in optical receiver. The receiver consists of TIA, LA, offset-cancellation-network and buffer to provide a conversion gain of 110 dB Omega and data rate of 2.5 Gbps operation. In the second receiver, the spatially modulated PD (SMPD) with -3 dB bandwidth of 590 MHz is integrated in optical receiver with the extra adaptive equalizer and demonstrates a data rate of 3.125 Gbps. Finally, the proposed novel structure of PD eliminates the slow diffusion photocarriers by using body contact design to create a new current path under the PD. A bandwidth of 2.8 GHz with 100 % improvement in PD is obtained. The eye diagrams of PD with cable connected amplifiers at 2.5 Gbps, 4 Gbps and 5 Gbps are demonstrated. Furthermore, the optical receiver's optical-electrical (O-E) conversion bandwidth is also increased from 3.6 GHz to 4.3 GHz. To our knowledge, these are the highest O-E conversion bandwidth of the PD and optical receiver ever reported by using the standard bulk 0.18 mu m Si CMOS technology.
A 340 GHz Triple-Push Oscillator With Differential Output in 40 nm CMOS
(2014-12-01)
Li, Chun-Hsing
;
Ko, Chun-Lin
;
Kuo, Chien-Nan
;
Kuo, Ming-Ching
;
Chang, Da-Chiang
A low-power triple-push oscillator with differential output is proposed in this letter. By extracting signals from the same current loop, the oscillator can naturally provide differential output without any additional active circuit or passive balun required. Therefore, the output power can be increased and the chip area and power consumption can be reduced. Realized in 40 nm CMOS technology, the proposed oscillator can oscillate at 340.6 GHz while providing equivalent isotropically radiated power (EIRP) as -21.8 dBm. The power consumption is only 34.1 mW from a 0.9 V supply. The oscillator core only occupies area of 0.028 mm(2).
前瞻矽奈米元件變異性及傳輸特性綜合研究(I)
(2009)
蘇彬
;
Su Pin
;
國立交通大學電子工程學系及電子研究所
在此研究計畫中，我們將對以矽為基底的前瞻奈米元件，針對其變異性及載子傳輸特性，進行綜合研究。在工作項目一中，我們將分別對超薄基體(UTB)，多閘極(multi-gate)以及gate-all-around 奈米線金氧半場效電晶體，建立一套包含Poisson 及Schrodinger 方程式之解的理論架構。利用這一套可考慮量子效應的解析解模型，我們將研究這三種元件結構並搭配不同的通道材料，其對製程變異的敏感度。我們的元件模型也將有助於未來奈米級元件的設計。在工作項目二中，我們將廣泛地研究先進CMOS 場效電晶體的隨機不匹配特性(random mismatch)。這項研究不僅對使用先進CMOS 元件的電路設計很重要，也有助於對奈米元件的本質參數變異(intrinsic parameter fluctuation)的根本了解。在工作項目三中，我們將對奈米級應變矽元件的戴子傳輸特性進行研究。這項研究將有助於了解極微縮應變矽元件的戴子傳輸機制，也對未來提昇戴子遷移率的元件設計有所幫助。
適用於無線通訊之互補式金氧半積體電路-總計畫
(2001)
吳重雨
;
CHUNG-YUWU
;
國立交通大學電子工程研究所
高性能互補式金氧半影像感測器、矽視網膜及具學習能力之影像處理類神經網路晶片系統設計研究(III)
(2001)
吳重雨
;
CHUNG-YUWU
;
交通大學電子工程系
高性混合訊號式發收機積體電路---子計畫I：互補式金氧半射頻發收機前置電路模組設計IP建立及應用研究(III)
(2001)
吳重雨
;
CHUNG-YUWU
;
交通大學電子工程系
適用於無線通訊之互補式金氧半積體電路-子計畫二:無線通訊之互補金氧半收發機前端電路設計
(2001)
吳重雨
;
CHUNG-YUWU
;
國立交通大學電子工程研究所
高性能混合訊號積體電路與系統之設計與研製---子計畫I：低電壓互補式金氧半射頻收發器晶片設計應用(III)
(1999)
吳重雨
;
CHUNG-YUWU
;
交通大學電子工程系
高性混合訊號式發收機積體電路---子計畫I：互補式金氧半射頻發收機前置電路模組設計IP建立及應用研究
(2000)
吳重雨
;
CHUNG-YUWU
;
交通大學電子工程系
2.4GHz CMOS 射頻前端電路設計(IV)-頻率合成器
(2001)
高曜煌
;
KAO YAO-HUANG
;
國立交通大學電信工程學系

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🏛️國立陽明交通大學機構典藏

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