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Fabrication of High-Performance Poly-Si Thin-Film Transistors With Sub-Lithographic Channel Dimensions
(2014-11-01)
Lee, Ko-Hui
;
Lin, Horng-Chih
;
Huang, Tiao-Yuan
;
電子工程學系及電子研究所
;
Department of Electronics Engineering and Institute of Electronics
A method for fabrication of tri-gate polycrystalline silicon (poly-Si) transistors with short channel length and width is proposed and demonstrated without employing costly lithographic tools. Specifically, the method employs a spacer formation technique to extend source and drain regions so as to scale down the channel length below sub-lithographic dimension. Concurrently, the channel width is scaled down below sub-lithographic dimension by using a photoresist (PR) trimming technique. Our results show that the reduction in the planar channel width is essential for suppressing the short-channel effects. Finally, devices with channel length of 120 nm and planar channel width of 110 nm are demonstrated with superior electrical characteristics in terms of small subthreshold swing (146 mV/dec) and low drain-induced-barrier-lowing value (100 mV/V).
A Novel p-n-Diode Structure of SONOS-Type TFT NVM With Embedded Silicon Nanocrystals
(2010-11-01)
Chiang, Tsung-Yu
;
Ma, William Cheng-Yu
;
Wu, Yi-Hong
;
Wang, Kuan-Ti
;
Chao, Tien-Sheng
In this letter, for the first time, a novel p-n-diode (PND) structure of SONOS-type thin-film transistor (TFT) nonvolatile memory (NVM) with embedded silicon nanocrystals (Si-NCs) in the silicon nitride layer using an in situ method is successfully demonstrated. This novel structure has many advantages, including high density and suitability for 3-D circuit integration. Hot-electron injection and hot-hole injection are used as the program and erase methods, respectively. The sensing current of the three-terminal PND-TFT NVM is 10(-7) A by the band-to-band tunneling current. A much larger memory window (> 12 V) and good data retention time (> 10(8) s for 12% charge loss) are exhibited. The device appears to have great potential for system-on-panel applications.
Poly-Si Nanowire Nonvolatile Memory With Nanocrystal Indium-Gallium-Zinc-Oxide Charge-Trapping Layer
(2010-12-01)
Chen, Lun-Chun
;
Wu, Yung-Chun
;
Lin, Tien-Chun
;
Huang, Jyun-Yang
;
Hung, Min-Feng
This letter introduces a polycrystalline silicon (poly-Si) thin-film nonvolatile memory (NVM) with a nanocrystal (NC) indium-gallium-zinc-oxide (IGZO) charge-trapping layer. Experimental results indicate that this NVM exhibits high and symmetric program/erase speeds through the Fowler-Nordheim tunneling mechanism. The memory window loss of the NVM with NC IGZO charge-trapping layer is 25% after 10(4) s at 85 degrees C due to deep quantum well, as well as high-density and deep trap sites in NC IGZO charge-trapping layer. Accordingly, a poly-Si thin-film transistor with NC IGZO charge-trapping layer is promising for NVM applications.
The effects of microcrystalline silicon film structure on low-high-low band-gap thin film transistor
(2000-01-29)
Chang, CY
;
Lee, YS
;
Huang, TY
;
Shih, PS
;
Lin, CW
The effects of hydrogenated microcrystalline silicon (mu c-Si:H) film with various crystalline factors on thin-film transistors (TFTs) with low-high-low band gap structure are studied. Compared to hydrogenated amorphous silicon (a-Si:H) TFT with conventional inverted-stagger structure, the device with mu c-Si:H film of high crystalline factor in the active channel depicts improved interfacial active layer near the gate insulator interface as well as the later-grown bulk active layer, resulting in improved device parameters including field effect mobility, threshold voltage, subthreshold swing and ON-current. While a-Si:H film of low crystalline factor and high-band-gap is proposed for the source and drain offset regions in the new device to prevent the band-to-band tunneling, thus alleviates the high OFF-current inherent in conventional mu c-Si:H thin-film transistors, resulting in an improved ON/OFF current ratio. (C) 2000 Elsevier Science S.A. All rights reserved.
High-performance solid-phase crystallized polycrystalline silicon thin-film transistors with floating-channel structure
(2008-04-01)
Chang, Chia-Wen
;
Deng, Chih-Kang
;
Chang, Che-Lun
;
Liao, Ta-Chuan
;
Lei, Tan-Fu
High-performance solid-phase crystallized polycrystalline silicon thin-film transistors with a floating-channel active region (FC poly-Si TFTs) are proposed in this study. A high-quality poly-Si channel film accompanied by a larger grain size and fewer microstructural defects could be obtained. Compared with the conventional poly-Si TFTs (CN poly-Si TFTs), the fabricated FC poly-Si TFTs exhibit superior electrical characteristics, including lower threshold voltage, higher field-effect mobility, and lower trap state density. These electrical performance improvements could be attributed to the fact that the a-Si film with a floating-channel structure can relieve the stress generated from the crystallization process accompanying the trap state density reduction and grain size enhancement. In addition, the FC poly-Si TFTs also exhibit improved hot-carrier stress immunity due to the reduced weak Si-H bonds from fewer grain boundaries in the poly-Si channel. Therefore, the proposed FC poly-Si TFTs can be easily fabricated by conventional solid-phase crystallization, and suitable for future high-performance flat-panel display applications.
Characteristics of polycrystalline silicon thin-film transistors with electrical source/drain extensions induced by a bottom sub-gate
(2002-05-01)
Yu, M
;
Lin, HC
;
Chen, GH
;
Huang, TY
;
Lei, TF
Characteristics of polycrystalline silicon thin-film transistors (TFT) with source/drain extensions induced by a bottom sub-gate were explored, high on/off current ratio up to 10(7) could be achieved for both n- and p-channel devices. Nevertheless, the performance is significantly degraded by a marked increase of off-state leak-age current when the channel length is scaled below 1 mum. Moreover, a hump in the subthreshold current-voltage regime is observed. After careful analysis, it is found that the leakage current is strongly dependent on the field strength and is not a thermally activated process. A leakage path along the bottom interface of the poly-Si channel layer is proposed to explain these results.
Investigation of inductively coupled plasma gate oxide on low temperature polycrystalline-silicon TFTs
(2002-06-01)
Tseng, CH
;
Chang, TK
;
Chu, FT
;
Shieh, JM
;
Dai, BT
By optimizing the inductively coupled plasma (ICP) oxidation condition, a thin oxide of 10 nm has been grown at 350degreesC to achieve excellent gate oxide integrity of low leakage current < 5x10(-8) A/cm(2) (at 8 MV/cm), high breakdown field of 9.3 MV/cm and low interface trap density of 1.5x10(11)/eV cm(2). The superior performance poly-Si TFTs using such a thin ICP oxide were attained to achieve a high ON current of 110 μA/μm at V-D=1 V and V-G = 5 V and the high electron field effect mobility of 231 cm(2)/V.S.
Improvement of brightness uniformity by AC driving scheme for AMOLED display
(2004-11-01)
Lin, YC
;
Shieh, HPD
;
光電工程學系
;
Department of Photonics
We propose an ac voltage driving scheme which can improve the brightness uniformity of active-matrix organic light-emitting diode (AMOLED) displays. Through the use of a charge feed-through mechanism and an ac driving voltage, the voltage drop caused by the parasitic resistance can be compensated. A 2.2 in AMOLED panel with a resolution of 176 x RGB x 220 has been fabricated by low temperature polycrystalline silicon technology to evaluate the performance of the ac driving scheme. Experimental results show that a brightness uniformity of higher than 91.6%, achieved by the ac driving scheme, in contrast to that of 74% achieved by a dc driving scheme.
An Oxygen Gettering Scheme for Improving Device Mobility and Subthreshold Swing of InGaZnO-Based Thin-Film Transistor
(2014-09-01)
Hsu, Hsiao-Hsuan
;
Chang, Chun-Yen
;
Cheng, Chun-Hu
;
Chiou, Shan-Haw
;
Huang, Chiung-Hui
This study involved developing a low-power and high-mobility metal-oxide thin-film transistor that incorporated a bilayer IGZO/IGZO:Ti semiconductor material. Compared with control metal-oxide TFTs, the bilayer IGZO TFT through thickness modulation of IGZO: Ti can reach the smallest subthreshold swing (85 mV/decade) and the highest field effect mobility (49 cm(2)/Vs) at a drive voltage of <3 V. This performance level improvement can be attributed to the gettering effect caused by the IGZO: Ti capping layer and its dual advantages, which enhance device mobility and improve gate swing.
Characteristic Evolution from Rectifier Schottky Diode to Resistive-Switching Memory With Al-Doped Zinc Tin Oxide Film
(2014-04-01)
Fan, Yang-Shun
;
Liu, Po-Tsun
;
光電工程學系
;
Department of Photonics
We demonstrate a metal sandwiched Al-doped zinc tin oxide (AZTO) thin-film device to exhibit a characteristic evolution process from Schottky junction diode to resistive-switching random access memory (RRAM) applications. The proposed TiN/Ti/AZTO/Pt device can initially show good rectifying characteristics and high forward-bias current for Schottky diodes. After applying with an electrically triggered forming process, the transition of electrical behavior occurs and evolves from the diode to RRAM characteristics. The RRAM device exhibits the coexistence of bipolar and unipolar resistive-switching modes through the positive-bias forming and reversed-bias forming process, respectively. In addition, the RRAM device with bipolar mode can perform the functionality of multilevel cell storage, while the one with unipolar mode shows stable resistive-switching performance. Furthermore, one-transistor and one-resistor (1T1R) architecture with an RRAM cell connected with a thin-film transistor (TFT) device is developed in this paper. The TFT device using AZTO film as an active channel layer performs good electrical characteristics for a driver in the 1T1R operation scheme. The integration of AZTO-based electronic devices has great potential for increasing the application diversity of metal oxide AZTO thin film as well as the flexibility of circuit design in the emerging optoelectronic technologies.

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