🏛️國立陽明交通大學機構典藏

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High-reliability gate driver on array using noise sharing of precharging node for thin film transistor-liquid crystal display application
(1970-01-01)
Zheng, Guang-Ting
;
Liu, Po-Tsun
;
Du, Chia-Heng
;
Wang, Teng-Yu
;
顯示科技研究所
A hydrogenated amorphous silicon (a-Si:H) thin-film transistor (TFT) gate driver with negative bias stress on precharging node for noise sharing with high-reliability 10.7-in. automotive display has been proposed. The proposed circuit is composed of precharging block, pull-up and pull-down block, and noise-free block. The precharging block not only starts up the gate driver but also reduces noise with 33% duty cycle. Duplicate output signals are responsible for turning on next stage to decrease the loading of output of gate line. Moreover, negative bias voltage recovering of TFTs could be created by setting another lower voltage source to lower the threshold voltage degradation of TFTs. According to lifetime test results, the proposed gate driver of 708 stages passes the extreme temperature range test (90 degrees C and -40 degrees C) for simulation and -40 degrees C for measurement and remains stable over 800 h at 90 degrees C test. Finally, this design is successfully demonstrated in a 10.7-in. HD (1280 x RGB x 720) TFT-LCD panel.
Multioutputs single-stage gate driver on array with wide temperature operable thin-film-transistor liquid-crystal display for high resolution application
(2019-01-01)
Liu, Po-Tsun
;
Zheng, Guang-Ting
;
Lin, Yi-Chen
;
光電工程學系
;
顯示科技研究所
A hydrogenated amorphous silicon (a-Si:H) thin-film transistor (TFT) gate driver with multioutputs (eight outputs per stage) for high reliability, 10.7-inch automotive display has been proposed. The driver circuit is composed of one SR controller, eight driving TFTs (one stage to eight outputs) with bridging TFTs. The SR controller, which starts up the driving TFTs, could also prevent the noise of gate line for nonworking period. The bridging TFT, using width decreasing which connects between the SR controller and the driving TFT, could produce the floating state which is beneficial to couple the gate voltage, improves the driving ability of output, and reaches consistent rising time in high temperature and low temperature environment. Moreover, 8-phase clocks with 75% overlapping and dual-side driving scheme are also used in the circuit design to ensure enough charging time and reduce the loading of each gate line. According to lifetime test results, the proposed gate driver of 720 stages pass the extreme temperature range test (90 degrees C and -40 degrees C) for simulation, and operates stably over 800 hours at 90 degrees C for measurement. Besides, this design is successfully demonstrated in a 10.7-inch full HD (1080 x RGBx1920) TFT-liquid-crystal display (LCD) panel.
Design of dual-outputs-single-stage a-Si:H TFT gate driver for high resolution TFT-LCD application
(2016-05)
Zheng, Guang-Ting
;
Liu, Po-Tsun
;
Wu, Meng-Chyi
;
光電工程學系
;
顯示科技研究所
A new gate driver has been designed and fabricated by amorphous silicon technology. With utilizing the concept of sharing the noise free block in a single stage for gate driver, dual-outputs signals could be generated in sequence. By increasing the number of output circuit block in proposed gate driver, number of outputs per stage could also be adding that improves the efficiency for area reduction. Besides, using single driving thin-film-transistor (TFT) for charging and discharging, the area of circuit is also decreased by diminishing the size of pulling down TFT. Moreover, the proposed gate driver has been successfully demonstrated in a 5.5-inch Full HD (1080xRGBx1920) TFT-liquid-crystal display panel and passed reliability tests of the supporting foundry.
Design of Bidirectional and Low Power Consumption Gate Driver in Amorphous Silicon Technology for TFT-LCD Application
(2013-02-01)
Zheng, Guang-Ting
;
Liu, Po-Tsun
;
Wu, Meng-Chyi
;
Chu, Li-Wei
;
Yang, Meng-Chuan
A new gate driver has been designed and fabricated by amorphous silicon (a-Si) technology. With utilizing four clock signals in the design of gate driver on array (GOA), the pull-up transistor has ability for both output charging and discharging, and layout size of the proposed gate driver can be narrowed for bezel panel application. Moreover, lower duty cycle of clock signals can decrease static power loss to further reduce the overall power consumption of the proposed gate driver. The scan direction of the proposed gate driver can be adjusted by switching two direct control signals to present the reversal display of image. The proposed gate driver has been successfully demonstrated in a 4.5-inch WVGA (480 x RGB x 800) TFT-LCD panel and passed reliability tests of the supporting foundry.
Design of Integrated Gate Driver With Threshold Voltage Drop Cancellation in Amorphous Silicon Technology for TFT-LCD Application
(2011-12-01)
Chu, Li-Wei
;
Liu, Po-Tsun
;
Ker, Ming-Dou
;
電子工程學系及電子研究所
;
光電工程學系
A new integrated gate driver has been successfully designed and fabricated by amorphous silicon (a-Si) technology for a 3.8-in WVGA (800 x RGB x 480) TFT-LCD panel. With the proposed threshold voltage drop-cancellation technique, the output rise time of the proposed integrated gate driver can be substantially decreased by 24.6% for high-resolution display application. Moreover, the proposed noise reduction path between the adjacent gate drivers can reduce the layout area for slim bezel display. The transmittance brightness and contrast ratio of the demonstrated 3.8-inch panel show almost no degradation after the 500 h operation under 70 degrees C and -20 degrees C conditions.

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🏛️國立陽明交通大學機構典藏

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