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Subject: search.filters.subject.static noise margin (SNM)

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Now showing 1 - 4 of 4
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    Statistical Simulation of Static Noise Margin Variability in Static Random Access Memory
    (2010-11-01)
    Li, Yiming
    ;
    Cheng, Hui-Wen
    ;
    Han, Ming-Hung
    ;
    傳播研究所
    ;
    電機工程學系
    In this paper, we examine the impact of random-dopant-fluctuation (RDF), process-variation-effect (PVE), and workfunction-fluctuation (WKF), on 16-nm-gate metal-oxide-semiconductor field-effect-transistor (MOSFET) static random access memory (SRAM) cells. For planar MOSFETs with a threshold voltage (V(th)) of 140mV, the nominal static noise margin (SNM) of six-transistor (6T)-SRAM with unitary cell ratio (CR) is only 20mV; and the normalized SNM fluctuations (SNM) induced by RDF, PVE, and WKF are 80%, 31%, and 48%, respectively, which may damage SRAM's operation. Two improvement approaches are further implemented; first, eight-transistor (8T)-SRAM and 6T-SRAM with increased CR are examined. Compared with the conventional 6T-SRAM, under the same Vth, the SNM of 8T-SRAM is enlarged to 233 mV and the corresponding RDF, PVE, and WKF-induced SNM are reduced to 9.5%, 6.4%, and 7%, respectively, at a cost of 30% extra chip area. Without increasing chip area, device with raised Vth, doping profile engineering and using silicon-on-insulator fin-type field-effect transistors (SOI FinFETs) are further advanced. The 6T SOI FinFETs SRAM exhibits the smallest sigma SNM, with merely 5.3%, 1.2%, and 2.3%, resulting from RDF, PVE, and WKF, respectively, where the value of SNM is equal to 125 mV.
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    Comparison of 4T and 6T FinFET SRAM Cells for Subthreshold Operation Considering Variability-A Model-Based Approach
    (2011-03-01)
    Fan, Ming-Long
    ;
    Wu, Yu-Sheng
    ;
    Hu, Vita Pi-Ho
    ;
    Hsieh, Chien-Yu
    ;
    Su, Pin
    This paper investigates the cell stability of recently introduced four-transistor (4T) and conventional six-transistor (6T) fin-shaped field-effect transistor static random access memory (SRAM) cells operating in a subthreshold region using an efficient model-based approach to consider the impact of device variations. Compared with the 6T cell, this paper indicates that 4T SRAM cells exhibit a better nominal READ static noise margin (RSNM) because of the reduced READ disturb. For 4T cells, the nearly ideal values of V(write, 0) and V(write, 1) guarantee the positive nominal WRITE static noise margin (WSNM) for selected cells. For half-selected cells on the selected bit line, a sufficient margin is observed between WRITE time (for selected cells) and WRITE disturb (for half-selected cells). Using the established model-based approach, the variability of subthreshold 6T and 4T SRAM cells is assessed with 1000 samples. Our results indicate that the 4T driverless cell with a larger mu RSNM and a slightly worse sigma RSNM shows a comparable mu/sigma ratio in RSNM with the 6T cell. Furthermore, for a given cell area, 4T SRAM cells using relaxed device dimensions with reduced sigma RSNM can outperform the 6T cell. For WRITE operation, 4T SRAM cells exhibit a superior WSNM, whereas the design margin between WRITE time and WRITE disturb needs to be carefully examined to ensure an adequate margin considering device variability.
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    Static Noise Margin of Ultrathin-Body SOI Subthreshold SRAM Cells-An Assessment Based on Analytical Solutions of Poisson's Equation
    (2009-09-01)
    Hu, Vita Pi-Ho
    ;
    Wu, Yu-Sheng
    ;
    Fan, Ming-Long
    ;
    Su, Pin
    ;
    Chuang, Ching-Te
    This paper investigates the static noise margin (SNM) of ultrathin-body (UTB) SOI SRAM 6T/8T cells operating in the subthreshold region using analytical solutions of Poisson's equation validated with TCAD simulations. An analytical framework to calculate the SNM for UTB SOI SRAMs operating in the subthreshold region is presented. Our results indicate that for improving both read SNM (RSNM) and write SNM (WSNM), the back-gating technique is more effective in the subthreshold region than in the superthreshold region. The 6T UTB SOI subthreshold SRAM cell with the back-gating technique by increasing the strength of the pull-up transistors and decreasing the strength of the pass-gate transistors shows comparable RSNM with the 10T bulk subthreshold SRAM and an improvement in RSNM variation. Due to better electrostatic integrity, the back-gating technique (pull-up transistors with positive back-gate bias, pull-down/pass-gate transistors with negative back-gate bias) mitigates the 6T UTB SOI SRAM RSNM variation significantly with some improvement in RSNM. Increasing cell beta-ratio shows a limited improvement on RSNM and has no benefit on the SNM variability for the subthreshold operation. The UTB SOI 8T SRAM cell exhibits RSNM 2 x larger than the 6T SRAM cell in the subthreshold region. Both negative bit-line voltage (VBL) and boosted word-line voltage (VWL) are more effective than lower cell supply voltage to improve WSNM, and negative VBL shows a larger improvement in WSNM than boosted VWL.
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    Investigation of Cell Stability and Write Ability of FinFET Subthreshold SRAM Using Analytical SNM Model
    (2010-06-01)
    Fan, Ming-Long
    ;
    Wu, Yu-Sheng
    ;
    Hu, Vita Pi-Ho
    ;
    Su, Pin
    ;
    Chuang, Ching-Te
    In this paper, the static noise margin (SNM) of FinFET static random access memory (SRAM) cells operating in the subthreshold region was investigated using an analytical solution of 3-D Poisson's equation. An analytical SNM model for subthreshold FinFET SRAM was demonstrated and validated by 3-D technology computer-aided design (TCAD) mixed-mode simulations. When compared with bulk SRAM, the standard 6T FinFET cell showed larger nominal READ SNM (RSNM), better variability immunity, and lesser temperature sensitivity of cell stability. Furthermore, examination of the stabilities of several novel independently controlled gate FinFET SRAM cells by using the proposed SNM model showed significant nominal RSNM improvements in these novel cells. However, the write ability is found to be degraded, which thus becomes an important concern for certain configurations in the subthreshold region. The result obtained indicates that the READ/WRITE word line voltage control technique is more effective than transistor sizing in improving the stability and write ability of the FinFET subthreshold SRAM. Furthermore, the impacts of process-induced variations on cell stability were also assessed. When compared with RSNM, it was found that WRITE SNM is more susceptible to process variations. While 6T is not a viable candidate for subthreshold SRAM, and 8T/10T cells must be used in bulk CMOS, the present analysis established the potential of 6T FinFET cells for subthreshold SRAM applications.