完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | 溫宏斌 | en_US |
dc.contributor.author | Wen Charles H.-P. | en_US |
dc.date.accessioned | 2014-12-13T10:45:01Z | - |
dc.date.available | 2014-12-13T10:45:01Z | - |
dc.date.issued | 2010 | en_US |
dc.identifier.govdoc | NSC99-2220-E009-011 | zh_TW |
dc.identifier.uri | http://hdl.handle.net/11536/100244 | - |
dc.identifier.uri | https://www.grb.gov.tw/search/planDetail?id=2159110&docId=347485 | en_US |
dc.description.sponsorship | 行政院國家科學委員會 | zh_TW |
dc.language.iso | zh_TW | en_US |
dc.subject | 軟性電子錯誤率 | zh_TW |
dc.subject | 製程變異 | zh_TW |
dc.subject | 支持向量回歸 | zh_TW |
dc.subject | 蒙地卡羅 | zh_TW |
dc.subject | 統計靜態時序分析 | zh_TW |
dc.subject | soft error | en_US |
dc.subject | process variation | en_US |
dc.subject | SVM | en_US |
dc.subject | Monte Carlo | en_US |
dc.subject | SSTA | en_US |
dc.title | 後次微米時代新興電子設計自動化技術之研究---子計畫四:應用計算智慧推理處理後深次微米時代電路設計上的可靠度挑戰(III) | zh_TW |
dc.title | Coping with Reliability Challenges to Circuit Designs beyond Deep Sub-Micron Era by Computational Intelligence Reasoning (III) | en_US |
dc.type | Plan | en_US |
dc.contributor.department | 國立交通大學電信工程學系(所) | zh_TW |
顯示於類別: | 研究計畫 |