Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | 曾俊元 | en_US |
dc.contributor.author | TSENG TSEUNG-YUEN | en_US |
dc.date.accessioned | 2014-12-13T10:45:05Z | - |
dc.date.available | 2014-12-13T10:45:05Z | - |
dc.date.issued | 2010 | en_US |
dc.identifier.govdoc | NSC99-2221-E009-166-MY3 | zh_TW |
dc.identifier.uri | http://hdl.handle.net/11536/100288 | - |
dc.identifier.uri | https://www.grb.gov.tw/search/planDetail?id=2120517&docId=339418 | en_US |
dc.description.abstract | 隨著近代消費性電子產品,如:手機、個人電腦、MP3 和數位相機等,需求愈增的腳步,非揮發 性記憶體已成為現今半導體工業之研發重點。電阻式非揮發性記憶體為“金屬/電阻層/金屬”的結構,具 有非破壞性讀取、多重記憶狀態、結構簡單及所需面積小等優點;然而,就目前電阻式非揮發性記憶 體的研究與實際應用上,寫入/抹除切換速度、操作電壓、記憶保持時間和可靠度性能等方面,仍有極 大的改善空間。 以氧化物作為電阻式記憶體的電阻轉態層之機制說法眾說紛紜,但根據已發表的文獻,以電場引 發微小缺陷區域且串聯成導電路徑(通稱“燈絲filament”)較為廣泛接受。但由於所謂燈絲的形成或斷裂 乃屬機率性,故電子藉燈絲為路徑所造成的導電性不易有效精準的調控。過去我們實驗室對於氧化鋯 (ZrO2)薄膜電阻式記憶體之研究成果顯示可成功地利用活性金屬鈦電極有效地侷限住ZrO2 薄膜中燈絲 的形成或斷裂的位置,不僅大幅地改善了ZrO2 薄膜中電阻態的轉換特性,且達到高可靠度的操作次 數,相關的研究成果已被報導;然而,為了進一步提升ZrO2 電阻式記憶體之效能,本計畫的構想是以 ZrO2 薄膜作為電阻層,經由薄膜內摻雜金屬、嵌入奈米晶粒、亦或電漿及奈米壓痕等表面處理,希望 可藉由外加異質缺陷方式有效地控制電阻層中之主要缺陷形成,更清楚地侷限並掌握燈絲導電路徑的 形成與斷裂之位置,進而降低操作電壓,與提升速度、可靠度等相關性能。 本計畫預定將以三年進行,第一年主要工作為利用摻雜金屬離子與嵌入金屬奈米晶粒於ZrO2 氧化 物薄膜,配合改變ZrO2 薄膜整體厚度以及熱處理條件,欲探討不同濃度的金屬摻雜以及不同種類金屬 奈米晶粒,對於電子捕捉能力的影響;並研究內含金屬摻雜以及金屬奈米晶粒之ZrO2 氧化物薄膜的電 流傳導機制,藉以瞭解記憶體切換機制與材料特性的相依性。第二年計畫以ZrO2 電阻層為主的記憶薄 膜,探討其表面經由電漿(plasma)與奈米壓痕(nano-indentation)等處理對元件記憶效應的影響,並觀察 其金屬電極與ZrO2 薄膜間的界面反應之於記憶效應的影響,期盼能藉此侷限並控制氧化鋯電阻式記憶 體的電阻轉態區域於一維度與二維度空間,進而改善電阻式記憶體之整體電性、可靠度等相關性能表 現。第三年的研究中,將實現電阻式記憶體於不同電路結構中,如整合一個非揮發性電阻式記憶元件 至標準互補式金氧半電晶體製程(CMOS process)中,並搭配一個存取電晶體或二極體作為一組記憶包 (memory cell),亦或以記憶陣列(memory array)以實現電路結構。 | zh_TW |
dc.description.abstract | With the arrival of Digital Age, nonvolatile memory (NVM) plays an important role in the semiconductor industry. Resistance random access memory (RRAM) has several advantages, such as nondestructive reading, multilevel memory, simple structure, and high density. However, there are still various important unresolved problems, including the write/erase speed, operation voltage, retention time, and the reliability issues, which are still needed to be improved before realizing commercial applications. So far, the resistive switching mechanisms in RRAM are still in debate. The most general one is based on the “conducting filaments” which consist of local defect regions induced by electric field. However, the formation/rupture of the filaments depends on the probability. Based on our previous work in the ZrO2-based RRAM device, we have successfully confined the formation/rupture position of the conducting filaments by utilizing active Ti as the top electrode. Besides, we also improved the reliability performance in the ZrO2-based device, where the relevant excellent properties have been reported. To further acquire insight into the ZrO2-based device, we propose to dope metal ions and bury the metal nanocrystals within ZrO2, and even use the surface treatments on the ZrO2 memory films. We hope to confine the resistive switching region in 1-D and 2-D space by artificial extrinsic defects within the ZrO2-based devices to further improve their performance and reliability. In the first year, we will dope metal ions and embed metal nanocrystals within ZrO2 films, further altering the ZrO2 film thickness and the annealing conditions to control the dopant distribution and the nanocrystal size. The capability of electron trapping for the various kinds of metal dopants and nanocrystals will be studied. Moreover, the current conduction mechanism of the dopants and nanocrystals incorporated ZrO2 thin films will also be investigated to understand the correlation between memory switching origin and material characteristics. In the second year, we will study the effect of the metal electrode and the ZrO2 surface treatment, such as plasma and nano-indentation process, on the memory switching properties. We expect to confine the resistive switching regions in 1-D and 2-D spaces by artificial extrinsic defects and further develop high performance and high reliability for ZrO2-based RRAM devices. In the third year, the ZrO2-based memory will be integrated into circuit level. The memory array, the access transistor and the access diode will be adapted to implement the ZrO2-based memory cells to investigate the possibility of practical application of nonvolatile memory. | en_US |
dc.description.sponsorship | 行政院國家科學委員會 | zh_TW |
dc.language.iso | zh_TW | en_US |
dc.subject | 非揮發性記憶體 | zh_TW |
dc.subject | 電阻式記憶體 | zh_TW |
dc.subject | 二氧化鋯 | zh_TW |
dc.subject | 電阻轉態 | zh_TW |
dc.subject | 低功率操作 | zh_TW |
dc.subject | 多組記憶態 | zh_TW |
dc.subject | Nonvolatile memory | en_US |
dc.subject | RRAM | en_US |
dc.subject | ZrO2 | en_US |
dc.subject | resistive switching | en_US |
dc.subject | low power | en_US |
dc.subject | multi-level | en_US |
dc.title | 非揮發性氧化鋯電阻式記憶元件於結構、特性與製程整合之相依性 | zh_TW |
dc.title | Structures-Properties-Process Integration Interrelationship of Nonvolatile ZrO/sub 2/ Resistance Random Access Memory Devices | en_US |
dc.type | Plan | en_US |
dc.contributor.department | 國立交通大學電子工程學系及電子研究所 | zh_TW |
Appears in Collections: | Research Plans |