標題: 應用於多視角立體視訊之多核心超微型通訊系統研究---子計畫四:多天線可重置多執行緒寬頻無線處理架構與技術開發(I)
Multi-Antenna Reconfigurable Broadband Multi-Thread Wireless Processor Architecture(I)
作者: 許騰尹
HSU TERNG-YIN
國立交通大學資訊工程學系(所)
關鍵字: 家用微型基地台;多重輸入多重輸出;正交分頻多工;多核心為基礎之高效能無線基頻處理器;可即時重組;(Femtocell);(Multiple Input Multiple Output;MIMO);(Orthogonal Frequency Division Multiplexing;OFDM);(Wireless Baseband Processor Unit;WPU);(Reconfigurable)
公開日期: 2010
摘要: 家用微型基地台(Femtocell)是突破大型基地台在室內有很嚴重的衰減和覆蓋率不佳的問題的解決
方案,為了因應室內的多視點3D 高畫質多媒體視訊傳輸所需要的Gigabits 等級傳輸速率。發展家
用高速多媒體微型基地台(Multi-Gigabits Multimedia Femtocell)並且兼顧效能、整合與彈性這三大原
則是實作上的一大挑戰。
本計畫的研究重點有下列幾項特點:一、設計高效能多執行緒無線基頻處理器(WPU)以提供高運
算處理能力和可重製化(Reconfigurable)的特性;二、使用多輸入多輸出偵測建立LTE-A based 16 x
16 MIMO-OFDM 平台達成超十億位元級傳輸速度的目標,並發展適用之波束成形(Beam-forming)
的技術;三、發展高速傳輸模式下之對抗射頻與通道非理想效應基頻演算法及核心同步技術;四、
利用多核心陣列處理器實現高效能無線基頻處理器的軟體無線電(SDR)以提供基頻演算法快速驗
證平台。
在三年的計畫當中,我們將在第一年度開發LTE-A based 16 x 16 MIMO-OFDM 家用高速多媒體微
型基地台之基頻訊號處理器架構和各核心同步技術演算法之設計。第二年度則以多核心陣列處理
器數位訊號處理板實現LTE-A based 16x16 MIMO-OFDM 高效能無線基頻處理器的軟體無線電驗
證平台,進而驗證所提出之基頻訊號處理演算法的效能。第三年則著重於Corss-layer 系統整合,
並配合其他子計畫的規格,對無線基頻演算法做硬體與效能上的最佳化,以期能達成整體計畫預
期之目標。
A femtocell, which connects to the service provider’s network via broadband such as DSL or cable, is a small
cellular base station and typically designed for use in a home or small business. Although the base station has
very serious attenuation and poor coverage problems, a femtocell allows service providers to extend service
coverage indoors, especially when access points are limited or unavailable in this area. In order to apply the
multi-view 3D high-definition multimedia video transmission in indoor, the transmission rate needs
increasing to gigabits level. The development of domestic high-speed multimedia base station (Over Gigabits
Multimedia Femtocell) has challenge in implementation to obtain the batter performance, higher integration
and more flexibility.
This research project has the following several characteristics: First, the multi-threaded or multi-core
architecture design of wireless baseband processor unit (WPU) can provide high computing ability and
reconfiguration characteristics; Second, the multiple-input multiple-output detection block can enhance the
performance to obtain the goal of gigabits-level transmission rates in LTE-A based 16 x 16 MIMO-OFDM
platform; Third, the new software-defined radio (SDR) verification platform, which use the array processor
DSP, can fast evaluate baseband algorithms; Fourth, the development of baseband algorithms and essential
synchronization technology against the non-ideal effects of channel or RF in the high-speed transmission
mode.
Among the three-year plan, we will develop the baseband architecture of LTE-A based 16 x 16
MIMO-OFDM home-used high-speed multimedia femtocell and major synchronization algorithm designs in
the first year. Array processor based on digital signal processing board is used to create the LTE-A based
16x16 MIMO-OFDM SDR verification platform, and then verify the performance of proposed baseband
signal processing algorithms in the second year. In the third year, we focus on Corss-layer system integration
that matches the spec of other sub-plans, and optimize the hardware performance of wireless baseband
algorithms to gain the expected goal in the overall system.
官方說明文件#: NSC99-2221-E009-188
URI: http://hdl.handle.net/11536/100681
https://www.grb.gov.tw/search/planDetail?id=2113339&docId=337726
Appears in Collections:Research Plans