新穎性變阻式記憶體(RRAM)製作及其電性機制研究

Abstract

近年來，隨著半導體元件微縮技術的演進，使得傳統的浮停閘極記憶體面臨了元件可靠度的挑 戰，在奈米尺度下，等比例微縮後之穿隧氧化層厚度不再具有足夠的阻障效果，儲存於浮停閘內的電 荷容易藉由穿隧效應回到矽基材內而失去元件的記憶能力。此外，在經過長時間且高速的電壓操作 後，亦容易使過薄的氧化層產生漏電路徑，因而導致記憶體元件的失效。為了解決浮停閘極記憶體所 遇到的困境，許多不同技術的非揮發性記憶元件相繼被提出;其中，變阻式記憶體元件(RRAM)是最 具有發展潛力的技術之一。變阻式記憶體元件是利用簡單的金屬-絕緣體-金屬結構，在特定之絕緣體 材料[如: 氧化鎳(NiO)、氧化銅(CuO)]等施加電壓或電流，使絕緣體發生轉態而改變其電阻值，因 而可以在選定電壓下得到兩個不同的電阻值做為元件＂1＂和＂0＂的判讀，完全不同於浮停閘極記憶 體元件的儲存機制。變阻式記憶體元件擁有較好的耐操度及資訊儲存能力，同時，也具有極低的操作 電壓、極短的寫入抹除時間及高度的元件可微縮性，因此相當具有實用化的潛力。 本計畫主要的目標為新穎性變阻式記憶體元件之製作與電性機制研究。在第一年，主要將提出 具有潛力之變阻式記憶體結構，採用不同的薄膜沉積條件、電極、轉態層材料(如: 金屬氧化物、半 導體氮/氧化物)以及元件結構等方式製作高效能的記憶體元件，並搭配完整之電性量測與材料分析， 建立元件最佳製程條件及元件參數之資料庫，同時萃取相關的特性分析，完成變阻式記憶體元件製 作。第二年，計畫除了著重於元件進一步的優化及改善，亦透過第一年之成果，嘗試提出變阻式記憶 體在操作過程中的電性轉態模型，探討元件特性與薄膜材料間的相關性，建立完整的變阻式記憶體元 件理論與其電性傳導機制。

Recently, the conventional floating-gate non-volatile memory (NVM) device has faced the challenge of reliability due to the requirement of device scaling down. The scaled tunnel oxide loses the absolute ability to restrain the stored charge in the floating-gate to tunnel back into the Si-substrate. In addition, after a long duration operation, the thinner tunneling oxide is easy to form an additional leakage paths that cause the memory device failed. Therefore, in recent years, the resistive random access memory (RRAM) is proposed to overcome the issue of charge-storage-based NVM. The storage mechanism of the RRAM formed with simple metal-insulator-metal (MIM) structure depends on the specific material, such as NiO、CuO, in which the resistivity is changeable by applying an proper voltage or current. Therefore, the device can obtain two different resistance values at the same voltage to be the signal of “1” and “0” of the memory device. It has been reported that the RRAM devices own excellent characteristics, such as superior reliability, short operation time and high scalability, which are advantageous to solute the issue of the next generation memory device. In this project, we will research on fabrication technology and electrical mechanism of novel RRAM devices. In the first year, the major topic is to fabricate the RRAM devices owning high potential for NVM application. We will establish the database of manufacturing processes by extracting the electrical performance of RRAM devices fabricated with different methods, electrodes material, switching layer (such as metal oxide and semioconductor oxide) and structures. In the secondary year, we will focus on enhancing the performance of RRAM devices by the followed post treatments and/or metal dopants. Besides, the different measuring methods and the material analyses will be employed to realize the switching mechanism and behavior of RRAM devices.