寬頻合作式無線多輸出入通訊系統---子計畫一：高效能合作式下行多輸出入正交分頻多工接取之多工及分集技術設計(I)

Abstract

分散及合作式多輸出入正交分頻多工接取通訊無線通訊技術為高效能之前瞻無線通訊技術，有別 於傳統單純點對點之基地台與行動者間通訊，此技術拓展至多點對多點間之通訊，因此一個行動台基 本上可與其身邊之任意通訊台(包含其他中繼台、行動台或基地台)進行合作式的傳輸通訊而達到更廣 義、更高效能之多工及分集通訊效果，最終達成更高效能之傳輸功能及品質。由於其技術之廣泛性因 此概念上有人稱之為虛擬多輸出入技術、網路多輸出入技術或者是巨觀輸出入技術。現有之802.16e MIMO 技術即含有簡單之倆行動台間合作分集訊號接收功能，目前制訂中802.16j 標準即在發展中繼 台與行動台間之合作、合作式的傳輸技術，而剛開始制訂之802.16m 標準預期將涵蓋相關之技術。 此合作式網路技術之效能取決於合作式多工及分及集技術的有效的運用，因此本計劃乃特別針對 下行之合作式多輸出入正交分頻通訊技術相關之多工及分集技術進行探討及研究，所涵蓋的議題有高 效能之多工及分集策略研究設計、合作式多工及分集接收之資料偵測法研究設計、快速基地台及中繼 台之感知研究設計、使用者在合作式多工頻譜與通道接取下之快速FFT 演算法設計、合作式通道解碼 演算法及網路編碼演算法之研究設計、及最終之系統之DSP/FPGA 展演設計。 本計畫分三年: 第一年: 為97 開始目前正執行中已屆四個月，主要研究議題為: (i) 合作式多輸出 入正交分頻多工接取技術之研究包含基礎原理之研究乃至實際系統技術如802.16e、802.16j 及802.16m 之研究。(ii) 接著設計相關之多工及分集技術包含前述之多工及分集策略。(iii) 資料偵測。(iv) 快速 基地台及中繼台之感知。(v) 使用者多工頻譜與通道接取分配所需之低複雜度FFT 演算法。(vi) 合作 式通道編解碼及網路編解碼演算法。(vii) 同時也將開始建置DSP/FPGA 快速原型展演平台系統。目前 在快速基地台及中繼台之感知演算法、低複雜度多通道接取FFT 演算法、合作式通道編解碼演算法已 有初步成果，此外已完成一無線通訊FPGA 快速模擬驗證平台。今年度為第二年，主要工作有: (i) 將 延續第一年之初步研究成果進行更高效能之技術開發設計。(ii) 同時將隨著802.16j 與802.16m 標準技 術的制訂進程作實際系統之技術開發。(iii) 這一年也將開始進行個別技術及演算法在快速DSP/FPGA 原型展演平台之驗證設計。第三年除了做改善第二年的成果外提出更高效能之相關分工及分集技術外， 將進行整合設計模擬及作最終展演系統之設計。

Distributed or cooperative MIMO OFDMA technology facilitates cooperative transmission among base stations, mobile stations and relay stations in the network so that a generalized and abstractive multiplexing and diversity transmission can be achieved. This results in higher transmission quality and data rate than conventional systems. Current 802.16e MIMO system includes some simple cooperative spatial multiplexing and diversity operations between two mobile stations. The 802.16j system under standardization mainly concerns on the issues of (cooperative) transmission between relay stations and mobile stations or base stations. The 802.16m standard in the early standardization process is expected to contain some flavor of the cooperative MIMO OFDMA technology. The success of cooperative MIMO technology is highly dependent on how the high-level multiplexing and diversity techniques are effectively devised. Hence, this project will specifically focus on the related issues to the design of multiplexing and diversity techniques for distributed downlink MIMO OFDMA systems. The issues include the investigation of multiplexing and diversity schemes, data detection methods, fast cognition of cell and relay stations, spectrum and subchannel assignment schemes and associated FFT algorithms, and cooperative channel and network coding, for distributed MIMO OFDMA systems. We will also verify and demonstrate the developed techniques by using fast prototype systems based on DSP and/or FPGA. This project spans for three years. In the first year, that is, the current on-going year, has been in progress for four months. The research topics to be investigated include: (i) Theory about the distributed MIMO OFDMA will be studied and investigated. Practical system technologies including 802.16e, 802.16j and 802.16m will also be studied. (ii) Then we will start to design preliminary cooperative multiplexing and diversity techniques mentioned previously for both standard and non-standard systems. (iii) Data detection for cooperative radio. (iv) Fast cognition of base station and relay station. (v) Low-complexity FFT algorithms for distributed multiuser and multichannel access. (vi) Cooperative channel coding and network coding. (vii) Meanwhile, we will also start to establish fast prototype DSP/FPGA system. Currently, we have come up with some substantial result on the design of fast and efficient algorithm for base station search and relay station search, low-complexity multiuser and multichannel FFT algorithm, and cooperative channel coding algorithm. Additionally, we have further improved our fast prototyping platform for broadband wireless communication. This year, namely the second year, our major research works are: (i) Continue and advance the first-year’s works and results. (ii) Keep pace with the progress of IEEE 802.16j and 802.16m standards, so as to develop practical application techniques. (iii) Conduct the simulation and verification of the developed techniques and algorithms on our DSP/FPGA fast prototyping system. In the third year, all the developed techniques and algorithms will be finalized and optimized. We will start the integration work with the other subproject on the fast prototype system and conduct a system demonstration.