奈米隨機存取記憶體的長時間可靠度劣化現象分析與可容忍此劣化現象之設計

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DC Field	Value	Language
dc.contributor.author	莊景德	en_US
dc.contributor.author	Chuang Ching-Te	en_US
dc.date.accessioned	2014-12-13T10:49:40Z	-
dc.date.available	2014-12-13T10:49:40Z	-
dc.date.issued	2009	en_US
dc.identifier.govdoc	NSC98-2221-E009-112	zh_TW
dc.identifier.uri	http://hdl.handle.net/11536/101736	-
dc.identifier.uri	https://www.grb.gov.tw/search/planDetail?id=1904632&docId=315640	en_US
dc.description.sponsorship	行政院國家科學委員會	zh_TW
dc.language.iso	zh_TW	en_US
dc.title	奈米隨機存取記憶體的長時間可靠度劣化現象分析與可容忍此劣化現象之設計	zh_TW
dc.title	Analysis of Long Term Degradation and Degradation-Tolerant Design of Nanoscale CMOS SRAM	en_US
dc.type	Plan	en_US
dc.contributor.department	國立交通大學電子工程學系及電子研究所	zh_TW
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APA	莊., & Chuang C. (2009). 奈米隨機存取記憶體的長時間可靠度劣化現象分析與可容忍此劣化現象之設計. https://www.grb.gov.tw/search/planDetail?id=1904632&docId=315640.
Bibtex	@article{2009, title={奈米隨機存取記憶體的長時間可靠度劣化現象分析與可容忍此劣化現象之設計}, author={莊景德 and Chuang Ching-Te}, journal={https://www.grb.gov.tw/search/planDetail?id=1904632&docId=315640}, year={2009}, url={https://ir.lib.nycu.edu.tw/handle/11536/101736?mode=full}, }