Full metadata record
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | 周景揚 | en_US |
| dc.contributor.author | JOU JING-YANG | en_US |
| dc.date.accessioned | 2014-12-13T10:50:03Z | - |
| dc.date.available | 2014-12-13T10:50:03Z | - |
| dc.date.issued | 2000 | en_US |
| dc.identifier.govdoc | NSC89-2215-E009-009 | zh_TW |
| dc.identifier.uri | http://hdl.handle.net/11536/101948 | - |
| dc.identifier.uri | https://www.grb.gov.tw/search/planDetail?id=541928&docId=99533 | en_US |
| dc.description.sponsorship | 行政院國家科學委員會 | zh_TW |
| dc.language.iso | zh_TW | en_US |
| dc.subject | 多媒體 | zh_TW |
| dc.subject | 系統晶片 | zh_TW |
| dc.subject | 系統驗證 | zh_TW |
| dc.subject | 單晶片系統 | zh_TW |
| dc.subject | Multimedia | en_US |
| dc.subject | System chip | en_US |
| dc.subject | System verification | en_US |
| dc.subject | System-on-a-chip (SOC) | en_US |
| dc.title | 多媒體系統晶片設計技術之究---子計畫V：系統晶片上系統驗證之研究(II) | zh_TW |
| dc.title | The Study on System Verification for Systems-on-Chips (II) | en_US |
| dc.type | Plan | en_US |
| dc.contributor.department | 交通大學電子工程系 | zh_TW |
| Appears in Collections: | Research Plans | |
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