利用重新排列掃描元件減低掃描位移功率

Abstract

掃描設計已是被廣泛使用的可測試性設計技術，它能增加複雜電路的控制能力 (controllability) 與 觀察能力 (observability)，使得電路在測試時可得到高度的錯誤涵蓋率 (fault coverage)。有了掃描設計, 被測電路 (circuit under test) 在測試模式下會比在功能模式下產生更多的信號轉變 (signal transitions)。 大量的信號轉變會導致過高的功率消耗，進而會造成電路實體上的損壞，或者是被測試電路的可靠度 降低，這些現象會降低電路的良率並縮短產品的生命週期。 在這個計畫中，我們將發展一個重新排列掃描元件的技術 (scan-cell reordering)，來減少在掃描移 動時所產生的信號轉變。不像之前的重新排列掃描元件技術，需要先指定測試集合中不在乎位元的 值，我們提出的方案能在保留不在乎位元的前提下，重新排列掃描元件來減少信號轉變。在完成重新 排列掃描元件後，我們利用測試圖案填值技術 (pattern-filling technique) 來更進一步減低功率消耗。為 了達到這個目標，且讓這個方案可實行，我們所提之技術須擁有下面四項功能: (1) 在未指定測試圖案 (unspecified test patterns) 的狀況下，發現並利用掃描元件間，測試反應的關係性 (response correlation)； (2) 在未指定測試圖案 (unspecified test patterns) 的狀況下，發現並利用掃描元件間，測試圖案的關係 性 (response correlation)；(3) 使用掃描資料反轉來增加測試反應和測試圖案的關係性；(4) 考慮並限 制重新排列掃描元件所產生的繞線資源。最後，我們會透過實驗，將所提出的重新排列掃描元件技術， 與現有論文中的重新排列掃描元件技術做比較。

The scan design has been a widely used DFT technique which can guarantee high fault coverage for a complex design by enhancing its controllability and observability. With the scan design, however, the CUT generates a much larger number of signal transitions in its test mode than that in its functional mode. This excessive power consumption caused by the signal transitions may result in physical damage or reliability degradation to the CUT, and in turn decreases the yield and product lifetime. In this project, we will develop a scan-cell reordering scheme to minimize the signal transitions during the scan shift. Unlike the previous scan-cell reordering techniques which need to specify all the don’t-care bits in the test cubes before reordering, the proposed scheme can preserve the don’t-care bits while reordering the scan cells for signal-transition minimization. Those preserved don’t-cares can then be utilized by a pattern-filling technique for a further power optimization. In order to achieve this goal and make the proposed scheme practical, the proposed cell-reordering scheme are designed to have the following four capabilities: (1) Identify and utilize the response correlations between scan cells based on unspecified test patterns; (2) Identify and utilize the pattern correlations between scan cells based on unspecified test patterns; (3) Increase both response and pattern correlations using scan-value inversion; and (4) Consider and limit the routing-resource overhead caused by scan-cell reordering. Its experimental results will be compared with published scan-cell reordering schemes as well.