標題: 智慧型仿生系統之晶片系統平台技術開發---子計畫三:應用於智慧型仿生系統晶片之高壓輸入/輸出電路設計(I)
High-Voltage Input/Output Driver Circuits for Intelligent Prostheses SoC Applications(I)
作者: 柯明道
KER MING-DOU
國立交通大學電子工程學系及電子研究所
關鍵字: 輸入輸出電路;可靠度;靜電防護;仿生系統晶片;Input/Output Driver;reliability;ESD;Intelligent Prostheses SOC
公開日期: 2008
摘要: 本計畫將針對總計畫之智慧型仿生系統之晶片系統平台技術開發,設計應用於智慧型仿生系統晶片之高壓輸入輸出的電路設計。在智慧型仿生系統晶片中,最後接到動物或人體上的等效負載,依照生物種類和接點處不同,負載變化量為幾百K歐姆到幾Mega歐姆,而最後的晶片由於是掛載在生物上,所以負載電流不能過大,不然會使得整個晶片過熱,一般負載電流為micro安培等級,由此可知,在輸出點會有相對高壓(大於20V)產生,因此如何能夠提供足夠的負載電流,又使得最後的輸出點電壓控制在穩定值,就是此計畫中高壓輸入輸出電路(High-Voltage Driver)的主要功能 此外,由於輸出點電壓過高的情況下,混壓輸入輸出電路上的問題,包括閘極氧化層劣化(gate-oxide degradation)、熱載子效應(hot-carrier effect)等,將會更為嚴重,也更必需要解決,而傳統的混壓輸入輸出電路上的解決方案,對於此處的高壓輸入輸出電路設計,並不能完全套用。除此之外,由於輸出的電壓相當高,且為了維持此高壓的穩定性,使得在輸出點前面的電路也需要利用同樣的高壓,甚至更高的高壓來驅動,才不會限制了輸出的高壓,因此就會需要高壓產生器/調節器、輸出驅動電路、位準轉換器、轉接器和控制器功能的電路,用來調整控制輸出點電壓和電流的準位。 最後,在晶片生成後,在組裝、使用、拿取中,晶片都有可能遭受到ESD的衝擊,使得晶片在未使用前就損壞,因此積體電路的靜電放電耐受度也是高壓輸入輸出電路設計的一個重要考量。本計畫發展以積體電路與生物科技的結合為目標,研究成果將發表於國際研討會與國際期刊,創新的研發成果也將申請專利,提供並保護業界使用本計畫之研究成果。
The novel high-voltage input/output driver circuit for SOC Platform Technology for Intelligent Prostheses proposed in this project will be developed. For intelligent prostheses SOC applications, the effective resistive load on animal or human body varies from kilo ohm mega ohm because of different kind of creatures and locations. The current loading can not be too large otherwise the chip is over heated. Therefore, the nominal current loading is about micro amp so the output node is at least 20 volts. The main function of high-voltage driver circuits in this project is to stabilize the output node with specified voltage and current. In addition, under the high-voltage in this project, some problems: gate-oxide degradation, hot-carrier effect, etc., will be more serious and need to be solved. Unfortunately, traditional methods and skills in conventional mixed-voltage input/output driver are not suitable here. In order to maintain the stability of specified voltage and current, the high-voltage input/output driver circuits need to utilize the same, even higher high-voltage to be the power supply. Therefore, the high-voltage input/output driver circuit should be composed of high-voltage generator/regulator, output driver, level shifter, adapter and controller. Finally, after the chip is produced, for packing, using, and fetching, the chip may suffer to the impact of ESD. Therefore, ESD protection of high-voltage input/output driver is also an important issue in this project. The goal of this project is to combine the integrated circuit skill and biology technology. The research results will be presented in the international conferences and published in the international journals. Patents will be applied in this project in order to provide and defend the usage of this invention to the industry.
官方說明文件#: NSC97-2220-E009-046
URI: http://hdl.handle.net/11536/102288
https://www.grb.gov.tw/search/planDetail?id=1695695&docId=292929
顯示於類別:研究計畫