穿隧場效電晶體及混合穿隧場效電晶體與金氧半場效電晶體的邏輯電路與靜態隨機存取記憶體之探索與評估

Full metadata record

DC Field	Value	Language
dc.contributor.author	莊景德	en_US
dc.contributor.author	Chuang Ching-Te	en_US
dc.date.accessioned	2014-12-13T10:51:01Z	-
dc.date.available	2014-12-13T10:51:01Z	-
dc.date.issued	2014	en_US
dc.identifier.govdoc	MOST103-2221-E009-196-MY2	zh_TW
dc.identifier.uri	http://hdl.handle.net/11536/102466	-
dc.identifier.uri	https://www.grb.gov.tw/search/planDetail?id=8363449&docId=449402	en_US
dc.description.sponsorship	科技部	zh_TW
dc.language.iso	zh_TW	en_US
dc.title	穿隧場效電晶體及混合穿隧場效電晶體與金氧半場效電晶體的邏輯電路與靜態隨機存取記憶體之探索與評估	zh_TW
dc.title	Exploration and Evaluation of Tunneling FET (TFET)-Based and Mixed TFET-MOSFET Logic Circuits and SRAMs	en_US
dc.type	Plan	en_US
dc.contributor.department	國立交通大學電子工程學系及電子研究所	zh_TW
Appears in Collections:	Research Plans