標題: 用於先進邏輯元件件與感測器應用之新式矽奈米線電晶體技術
Development of Novel Si Nanowire Transistor Technology for Advanced Logic Devices and Sensor Applications
作者: 林鴻志
LIN HORNG-CHIH
國立交通大學電子工程學系及電子研究所
關鍵字: 矽(鍺)奈米線場效電晶體;奈米線感測器;場發射器;記憶體元件;多閘極結構;機械式奈米開關元件;金屬誘發側向結晶;Si (Ge) nanowire (NW) FET,NW sensor,multiple-gated structure,field-emission device (FED),memory device,multiple-gated structure,mechanical nano-switch device,metal-induced lateral crystallization (MILC)。
公開日期: 2008
摘要: 奈米線相關研究近來獲得極多之矚目和探討,有鑑於由本團隊先前所研發出一具有低成本和簡易製程等優點之新穎邊襯式奈米線元件製造技術,在本專題計畫中,除了對原本特性加以改善外,更進一步提出多項有趣之應用,以展現其多功能性和實用性,包括:奈米級電子元件、奈米線感測器、奈米線電子場發射器、機械式奈米線開關裝置和記憶體元件等,同時在此計畫中將進行具有高載子遷移率之鍺奈米線的開發和分析,並可與矽奈米線整合成高性能之互補式金氧半電晶體元件(CMOS)。此外,另一新穎鑲嵌式奈米線製備方法亦在本計畫中提出,其同樣地不需先進曝光設備和技術便可完成,並可有效地應用至非揮發性奈米線記憶體元件之製作,以期能在低電壓下進行高效率的寫入/抹除動作,並具有良好的資料保存時間。因此,本研究計畫所提出之新穎奈米線電子元件製造技術,相信在可量產和再現性高之訴求下,達成高性能及高可靠度之相關電子元件,並進一步應用於相關領域和產品,以因應多元化奈米電子應用紀元的來臨。
For the coming of nano-electronics era, a number of methods for nanowire (NW) fabrication and research have been launched. Recently our group developed a novel but low-cost and simple method for fabricating spacer-type NW FETs. In this project, a great diversity of applications, including nano-scale devices, NW sensors, NW field-emission devices (FED), mechanical NW-switch devices and memory devices, are proposed and explored based on the developed approach. To address the issues that were encountered in the fabrication and application of the aforementioned NW devices, a modified scheme is also investigated in this project. With the potential of achieving higher carrier mobility, Ge NW FET will be further developed.
官方說明文件#: NSC96-2221-E009-212-MY3
URI: http://hdl.handle.net/11536/102499
https://www.grb.gov.tw/search/planDetail?id=1618660&docId=276811
顯示於類別:研究計畫